Inventor

COOK PETER W

GB19 patents

⚠️ This page may combine multiple inventors who share the name “COOK PETER W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

COOK PETER W

IBM

Interlocked synchronous pipeline clock gating

Synchronous to asynchronous to synchronous interface

IC chips including ALUs and identical register files whereby a number of ALUs directly and concurrently write results to every register file per cycle

Interlocked synchronous pipeline clock gating

Processor with low overhead predictive supply voltage gating for leakage power reduction

Processor with demand-driven clock throttling power reduction

Adaptive issue queue for reduced power at high performance

Interlocked synchronous pipeline clock gating

Method of reducing leakage current in sub one volt SOI circuits

Carry lookahead logical mechanism using affirmatively referenced transfer gates

Method of stalling one or more stages in an interlocked synchronous pipeline

Apparatus for determining if there is a loss of data during a shift operation

Partial decode shifter/rotator

Avoidance of hot electron operation of voltage stressed bootstrap drivers

Low-power circuit structures and methods for content addressable memories and random access memories

Circuit structures and methods for high-speed low-power select arbitration

CMOS and ECL logic circuit requiring no interface circuitry

Latch structure for interlocked pipelined CMOS (IPCMOS) circuits

ROBERTS GORDON L L C

Radiant energy control system