P

Inventor

YOO JAE-YOON

KR19 patents
⚠️ This page may combine multiple inventors who share the name “YOO JAE-YOON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SAMSUNG ELECTRONICS CO LTD

14 patents
US7385247B2Jun 10, 2008

At least penta-sided-channel type of FinFET transistor

SAMSUNG ELECTRONICS CO LTD46 citations96
US6835621B2Dec 28, 2004

Method of fabricating non-volatile memory device having a structure of silicon-oxide-nitride-oxide-silicon

SAMSUNG ELECTRONICS CO LTD69 citations96
US6383877B1May 7, 2002

Method of forming T-shaped isolation layer, method of forming elevated salicide source/drain region using the same, and semiconductor device having T-shaped isolation layer

SAMSUNG ELECTRONICS CO LTD49 citations96
US7033895B2Apr 25, 2006

Method of fabricating a MOS transistor with elevated source/drain structure using a selective epitaxial growth process

SAMSUNG ELECTRONICS CO LTD22 citations92
US6624496B2Sep 23, 2003

Method of forming T-shaped isolation layer, method of forming elevated salicide source/drain region using the same, and semiconductor device having T-shaped isolation layer

SAMSUNG ELECTRONICS CO LTD29 citations92
US6486039B2Nov 26, 2002

Method of fabricating a trench isolation structure having sidewall oxide layers with different thicknesses

SAMSUNG ELECTRONICS CO LTD53 citations92
US7723193B2May 25, 2010

Method of forming an at least penta-sided-channel type of FinFET transistor

SAMSUNG ELECTRONICS CO LTD13 citations84
US6878575B2Apr 12, 2005

Method of forming gate oxide layer in semiconductor devices

SAMSUNG ELECTRONICS CO LTD11 citations72
US7439596B2Oct 21, 2008

Transistors for semiconductor device and methods of fabricating the same

SAMSUNG ELECTRONICS CO LTD5 citations63
US7101776B2Sep 5, 2006

Method of fabricating MOS transistor using total gate silicidation process

SAMSUNG ELECTRONICS CO LTD4 citations63
US6987310B2Jan 17, 2006

Multi-layered structure including an epitaxial layer having a low dislocation defect density, semiconductor device comprising the same, and method of fabricating the semiconductor device

SAMSUNG ELECTRONICS CO LTD4 citations63
US7618868B2Nov 17, 2009

Method of manufacturing field effect transistors using sacrificial blocking layers

SAMSUNG ELECTRONICS CO LTD3 citations62
US7368792B2May 6, 2008

MOS transistor with elevated source/drain structure

SAMSUNG ELECTRONICS CO LTD0 citations52
US7084041B2Aug 1, 2006

Bipolar device and method of manufacturing the same including pre-treatment using germane gas

SAMSUNG ELECTRONICS CO LTD1 citations51

SK HYNIX INC

5 patents