Inventor
BOERSTLER DAVID W
US50 patents
⚠️ This page may combine multiple inventors who share the name “BOERSTLER DAVID W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
45 patentsUS6515530B1Feb 4, 2003
Dynamically scalable low voltage clock generation system
IBM65 citations96
US7322001B2Jan 22, 2008
Apparatus and method for automatically self-calibrating a duty cycle circuit for maximum chip performance
IBM18 citations93
US7245161B2Jul 17, 2007
Apparatus and method for verifying glitch-free operation of a multiplexer
IBM22 citations93
US7200064B1Apr 3, 2007
Apparatus and method for providing a reprogrammable electrically programmable fuse
IBM20 citations93
US6927604B2Aug 9, 2005
Clock signal selector circuit with reduced probability of erroneous output due to metastability
IBM34 citations93
US6927635B2Aug 9, 2005
Lock detectors having a narrow sensitivity range
IBM22 citations92
US6809602B2Oct 26, 2004
Multi-mode VCO
IBM22 citations92
US6501304B1Dec 31, 2002
Glitch-less clock selector
IBM44 citations92
US6483888B1Nov 19, 2002
Clock divider with bypass and stop clock
IBM34 citations92
US4998792AMar 12, 1991
Fiber optic mode conditioner
IBM30 citations92
US5175641ADec 29, 1992
Dual-mode laser diode transmitter
IBM35 citations90
US7913199B2Mar 22, 2011
Structure for a duty cycle correction circuit
IBM8 citations84
US7877222B2Jan 25, 2011
Structure for a phase locked loop with adjustable voltage based on temperature
IBM7 citations84
US7675338B2Mar 9, 2010
Duty cycle correction circuit whose operation is largely independent of operating voltage and process
IBM15 citations84
US7493229B2Feb 17, 2009
Adjusting voltage for a phase locked loop based on temperature
IBM8 citations84
US7446588B2Nov 4, 2008
Highly scalable methods and apparatus for multiplexing signals
IBM10 citations84
US7417480B2Aug 26, 2008
Duty cycle correction circuit whose operation is largely independent of operating voltage and process
IBM9 citations84
US7360135B2Apr 15, 2008
Apparatus and method for automatically self-calibrating a duty cycle circuit for maximum chip performance
IBM14 citations84
US7245172B2Jul 17, 2007
Level shifter apparatus and method for minimizing duty cycle distortion
IBM13 citations84
US7225092B2May 29, 2007
Method and apparatus for measuring and adjusting the duty cycle of a high speed clock
IBM15 citations84
US7113881B2Sep 26, 2006
Method and apparatus for semi-automatic extraction and monitoring of diode ideality in a manufacturing environment
IBM14 citations84
US6529082B1Mar 4, 2003
Dual mode charge pump
IBM16 citations84
US7019572B2Mar 28, 2006
Systems and methods for initializing PLLs and measuring VCO characteristics
IBM9 citations74
US8037431B2Oct 11, 2011
Structure for interleaved voltage controlled oscillator
IBM5 citations72
US7391277B2Jun 24, 2008
Interleaved voltage controlled oscillator
IBM8 citations72
US5389832AFeb 14, 1995
Capacitively cross-coupled DCS emitter-follower output stage
IBM7 citations71
US8032850B2Oct 4, 2011
Structure for an absolute duty cycle measurement circuit
IBM3 citations63
US7969250B2Jun 28, 2011
Structure for a programmable interpolative voltage controlled oscillator with adjustable range
IBM6 citations63
US7917318B2Mar 29, 2011
Structure for a duty cycle measurement circuit
IBM4 citations63
US7904264B2Mar 8, 2011
Absolute duty cycle measurement
IBM4 citations63
US7358785B2Apr 15, 2008
Apparatus and method for extracting a maximum pulse width of a pulse width limiter
IBM5 citations63
US7321651B2Jan 22, 2008
High frequency circuit capable of error detection and correction of code patterns running at full speed
IBM4 citations63
US7265600B2Sep 4, 2007
Level shifter system and method to minimize duty cycle error due to voltage differences across power domains
IBM2 citations63
US7260491B2Aug 21, 2007
Duty cycle measurement apparatus and method
IBM6 citations63
US6963629B2Nov 8, 2005
Adaptive phase locked loop
IBM6 citations63
US7782146B2Aug 24, 2010
Interleaved voltage controlled oscillator
IBM2 citations61
US5396182AMar 7, 1995
Low signal margin detect circuit
IBM4 citations60
US7289926B2Oct 30, 2007
System and method for examining high-frequency clock-masking signal patterns at full speed
IBM0 citations52
US7786813B2Aug 31, 2010
Interleaved voltage controlled oscillator
IBM0 citations51
US8381143B2Feb 19, 2013
Structure for a duty cycle correction circuit
IBM0 citations42
US7958469B2Jun 7, 2011
Design structure for a phase locked loop with stabilized dynamic response
IBM0 citations42
US7895005B2Feb 22, 2011
Duty cycle measurement for various signals throughout an integrated circuit device
IBM0 citations42
US7737794B2Jun 15, 2010
Phase locked loop with temperature and process compensation
IBM0 citations42
US7519498B2Apr 14, 2009
Thermal sensing method and apparatus using existing ESD devices
IBM0 citations42
US5274285ADec 28, 1993
Enhanced differential current switch compensating upshift circuit
IBM0 citations39
TOSHIBA KK
3 patentsUS7511554B2Mar 31, 2009
Systems and methods for level shifting using AC coupling
TOSHIBA KK20 citations93
US7642863B2Jan 5, 2010
Systems and methods for PLL linearity measurement, PLL output duty cycle measurement and duty cycle correction
TOSHIBA KK5 citations63
US7994830B2Aug 9, 2011
Systems and methods for PLL linearity measurement, PLL output duty cycle measurement and duty cycle correction
TOSHIBA KK1 citations52