Inventor
FUKUO NORITAKA
JP14 patents
⚠️ This page may combine multiple inventors who share the name “FUKUO NORITAKA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SANDISK TECHNOLOGIES LLC
7 patentsUS10734400B1Aug 4, 2020
Three-dimensional memory device including bit lines between memory elements and an underlying peripheral circuit and methods of making the same
SANDISK TECHNOLOGIES LLC28 citations93
US10256167B1Apr 9, 2019
Hydrogen diffusion barrier structures for CMOS devices and method of making the same
SANDISK TECHNOLOGIES LLC22 citations87
US9847249B2Dec 19, 2017
Buried etch stop layer for damascene bit line formation
SANDISK TECHNOLOGIES LLC5 citations72
US9799527B2Oct 24, 2017
Double trench isolation
SANDISK TECHNOLOGIES LLC3 citations72
US9768183B2Sep 19, 2017
Source line formation and structure
SANDISK TECHNOLOGIES LLC2 citations70
US10886366B2Jan 5, 2021
Semiconductor structures for peripheral circuitry having hydrogen diffusion barriers and method of making the same
SANDISK TECHNOLOGIES LLC0 citations61
US9666479B2May 30, 2017
Patterning method for low-k inter-metal dielectrics and associated semiconductor device
SANDISK TECHNOLOGIES LLC0 citations51
SANDISK TECHNOLOGIES INC
6 patentsUS9177853B1Nov 3, 2015
Barrier layer stack for bit line air gap formation
SANDISK TECHNOLOGIES INC9 citations83
US9524904B2Dec 20, 2016
Early bit line air gap formation
SANDISK TECHNOLOGIES INC12 citations80
US9391081B1Jul 12, 2016
Metal indentation to increase inter-metal breakdown voltage
SANDISK TECHNOLOGIES INC4 citations71
US9401304B2Jul 26, 2016
Patterning method for low-k inter-metal dielectrics and associated semiconductor device
SANDISK TECHNOLOGIES INC1 citations51
US9607997B1Mar 28, 2017
Metal line with increased inter-metal breakdown voltage
SANDISK TECHNOLOGIES INC0 citations50
US9478461B2Oct 25, 2016
Conductive line structure with openings
SANDISK TECHNOLOGIES INC0 citations49