Inventor
SPEERS THEODORE
US30 patents
⚠️ This page may combine multiple inventors who share the name “SPEERS THEODORE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ACTEL CORP
28 patentsUS7459772B2Dec 2, 2008
Face-to-face bonded I/O circuit die and functional logic circuit die system
ACTEL CORP266 citations99
US7358601B1Apr 15, 2008
Architecture for face-to-face bonding between substrate and multiple daughter chips
ACTEL CORP269 citations99
US7129746B1Oct 31, 2006
System-on-a-chip integrated circuit including dual-function analog and digital inputs
ACTEL CORP156 citations99
US7170315B2Jan 30, 2007
Programmable system on a chip
ACTEL CORP118 citations98
US7102391B1Sep 5, 2006
Clock-generator architecture for a programmable-logic-based system on a chip
ACTEL CORP63 citations98
US6838902B1Jan 4, 2005
Synchronous first-in/first-out block memory for a field programmable gate array
ACTEL CORP196 citations98
US7579895B2Aug 25, 2009
Clock-generator architecture for a programmable-logic-based system on a chip
ACTEL CORP28 citations96
US7385418B2Jun 10, 2008
Non-volatile memory architecture for programmable-logic-based system on a chip
ACTEL CORP28 citations96
US7352206B1Apr 1, 2008
Integrated circuit device having state-saving and initialization feature
ACTEL CORP20 citations96
US7102384B1Sep 5, 2006
Non-volatile memory architecture for programmable-logic-based system on a chip
ACTEL CORP14 citations96
US7613943B2Nov 3, 2009
Programmable system on a chip
ACTEL CORP32 citations95
US7423451B2Sep 9, 2008
System-on-a-chip integrated circuit including dual-function analog and digital inputs
ACTEL CORP10 citations92
US7298178B1Nov 20, 2007
Clock-generator architecture for a programmable-logic-based system on a chip
ACTEL CORP24 citations92
US7112993B2Sep 26, 2006
Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGA
ACTEL CORP32 citations92
US6980027B2Dec 27, 2005
Synchronous first-in/first-out block memory for a field programmable gate array
ACTEL CORP12 citations92
US7937601B2May 3, 2011
Programmable system on a chip
ACTEL CORP11 citations91
US8040151B2Oct 18, 2011
Programmable logic device with programmable wakeup pins
ACTEL CORP12 citations84
US7884640B2Feb 8, 2011
PLD providing soft wakeup logic
ACTEL CORP9 citations84
US7919979B1Apr 5, 2011
Field programmable gate array including a non-volatile user memory and method for programming
ACTEL CORP15 citations83
US7675320B2Mar 9, 2010
Non-volatile memory architecture for programmable-logic-based system on a chip
ACTEL CORP7 citations82
US7560952B2Jul 14, 2009
Integrated circuit device having state-saving and initialization feature
ACTEL CORP6 citations82
US7487376B2Feb 3, 2009
Programmable system on a chip
ACTEL CORP6 citations81
US7616026B2Nov 10, 2009
System-on-a-chip integrated circuit including dual-function analog and digital inputs
ACTEL CORP3 citations74
US7280058B1Oct 9, 2007
Mixed-signal system-on-a-chip analog signal direct interconnection through programmable logic control
ACTEL CORP7 citations74
US7394289B2Jul 1, 2008
Synchronous first-in/first-out block memory for a field programmable gate array
ACTEL CORP4 citations73
US7227380B2Jun 5, 2007
Synchronous first-in/first-out block memory for a field programmable gate array
ACTEL CORP6 citations73
US7414428B2Aug 19, 2008
Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGA
ACTEL CORP2 citations63
US7501872B2Mar 10, 2009
Clock-generator architecture for a programmable-logic-based system on a chip
ACTEL CORP4 citations62