Inventor
CANNON ETHAN H
US29 patents
⚠️ This page may combine multiple inventors who share the name “CANNON ETHAN H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
18 patentsUS7521776B2Apr 21, 2009
Soft error reduction of CMOS circuits on substrates with hybrid crystal orientation using buried recombination centers
IBM24 citations90
US7965540B2Jun 21, 2011
Structure and method for improving storage latch susceptibility to single event upsets
IBM10 citations84
US7888959B2Feb 15, 2011
Apparatus and method for hardening latches in SOI CMOS devices
IBM11 citations84
US7875854B2Jan 25, 2011
Design structure for alpha particle sensor in SOI technology and structure thereof
IBM8 citations84
US7704847B2Apr 27, 2010
On-chip heater and methods for fabrication thereof and use thereof
IBM9 citations84
US7315075B2Jan 1, 2008
Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors
IBM8 citations74
US7064414B2Jun 20, 2006
Heater for annealing trapped charge in a semiconductor device
IBM10 citations74
US7943482B2May 17, 2011
Method for semiconductor device having radiation hardened insulators and design structure thereof
IBM4 citations63
US7935609B2May 3, 2011
Method for fabricating semiconductor device having radiation hardened insulators
IBM4 citations63
US7795679B2Sep 14, 2010
Device structures with a self-aligned damage layer and methods for forming such device structures
IBM5 citations63
US7791123B2Sep 7, 2010
Soft error protection structure employing a deep trench
IBM2 citations63
US7388274B2Jun 17, 2008
Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors
IBM4 citations63
US7881135B2Feb 1, 2011
Method for QCRIT measurement in bulk CMOS using a switched capacitor circuit
IBM4 citations62
US7550730B1Jun 23, 2009
Method for detecting alpha particles in SOI technology
IBM5 citations62
US7719887B2May 18, 2010
CMOS storage devices configurable in high performance mode or radiation tolerant mode
IBM6 citations59
US8354858B2Jan 15, 2013
Apparatus and method for hardening latches in SOI CMOS devices
IBM0 citations52
US7791169B2Sep 7, 2010
Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors
IBM0 citations52
US7183758B2Feb 27, 2007
Automatic exchange of degraders in accelerated testing of computer chips
IBM1 citations47
CANNON ETHAN H
6 patentsUS8300452B2Oct 30, 2012
Structure and method for improving storage latch susceptibility to single event upsets
CANNON ETHAN H6 citations83
US8138573B2Mar 20, 2012
On-chip heater and methods for fabrication thereof and use thereof
CANNON ETHAN H10 citations83
US8120131B2Feb 21, 2012
Array of alpha particle sensors
CANNON ETHAN H6 citations83
US8647909B2Feb 11, 2014
Array of alpha particle sensors
CANNON ETHAN H2 citations61
US9165917B2Oct 20, 2015
In-line stacking of transistors for soft error rate hardening
CANNON ETHAN H2 citations60
US9223037B2Dec 29, 2015
Structure and method to ensure correct operation of an integrated circuit in the presence of ionizing radiation
CANNON ETHAN H1 citations51
BOEING CO
3 patentsUS11029355B2Jun 8, 2021
Direct measurement test structures for measuring static random access memory static noise margin
BOEING CO2 citations66
US11601119B2Mar 7, 2023
Radiation hardened flip-flop circuit for mitigating single event transients
BOEING CO0 citations60
US8054099B2Nov 8, 2011
Method and apparatus for reducing radiation and cross-talk induced data errors
BOEING CO2 citations60