Inventor

CHU SHAO-FU SANFORD

SG39 patents

⚠️ This page may combine multiple inventors who share the name “CHU SHAO-FU SANFORD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHU SHAO-FU SANFORD

CHARTERED SEMICONDUCTOR MFG

Method for reducing substrate capacitive coupling of a thin film inductor by reverse P/N junctions

Process to control the lateral doping profile of an implanted channel region

Method of fabrication of anti-fuse integrated with dual damascene process

Method for making a metal-insulator-metal (MIM) capacitor and metal resistor for a copper back-end-of-line (BEOL) technology

Integration of MOM capacitor into dual damascene process

Via/line inductor on semiconductor material

Method for forming self-aligned channel implants using a gate poly reverse mask

Method and structure to make planar analog capacitor on the top of a STI structure

Self-aligned precise high sheet RHO register for mixed-signal application

3-D spiral stacked inductor on semiconductor material

Method to eliminate top metal corner shaping during bottom metal patterning for MIM capacitors

Method for forming a thin-film, electrically blowable fuse with a reproducible blowing wattage

Heterojunction bipolar transistor using reverse emitter window

Formation of an interpoly capacitor structure using a chemical mechanical polishing procedure

Lateral heterojunction bipolar transistor and method of manufacture using selective epitaxial growth

Heterojunction BiCMOS semiconductor

Via/line inductor on semiconductor material

Method for forming self-aligned channel implants using a gate poly reverse mask

Method to form liquid crystal displays using a triple damascene technique

Method of manufacturing 3-D spiral stacked inductor on semiconductor material

Double polysilicon bipolar transistor

Double polysilicon bipolar transistor and method of manufacture therefor

Heterojunction bipolar transistor with self-aligned emitter and sidewall base contact

Self-aligned lateral heterojunction bipolar transistor

Self-aligned lateral heterojunction bipolar transistor

YANGTZE MEMORY TECH CO LTD

Staircase structures for three-dimensional memory device double-sided routing

Through silicon contact structure and method of forming the same

Through silicon contact structure and method of forming the same

Through silicon contact structure and method of forming the same

IBM

Modular MOSFETS for high aspect ratio applications

Method of making trimmable modular MOSFETs for high aspect ratio applications

GLOBALFOUNDRIES SG PTE LTD

Integrated circuit system employing an elevated drain

Integrated circuit system with hierarchical capacitor and method of manufacture thereof

GLOBALFOUNDRIES INC

Method of fabricating a MIM capacitor with minimal voltage coefficient and a decoupling MIM capacitor and analog/RF MIM capacitor on the same chip with high-K dielectrics

ZHANG SHAOQING

Integrated circuit system employing back end of line via techniques

CHARTERED SEMIONDUCTOR MFG LTD

Method and apparatus for a heterojunction bipolar transistor using self-aligned epitaxy

CHU SHAO-FU SANFORD

Integrated circuit system with hierarchical capacitor and method of manufacture thereof

LI YISUO

Integrated circuit system with double doped drain transistor

DONG YEMIN

Integrated circuit system with high voltage transistor and method of manufacture thereof