Inventor

LIM PENG SOON

MY50 patents

⚠️ This page may combine multiple inventors who share the name “LIM PENG SOON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIM PENG SOON

TAIWAN SEMICONDUCTOR MFG CO LTD

Etching back and selective deposition of metal gate

Semiconductor device and fabrication method thereof

Etching back and selective deposition of metal gate

Semiconductor device and manufacturing method thereof

Metal gate structure

Metal gate structure

Metal gate structure

Method of making a gate structure

Semiconductor device and fabrication method thereof

Semiconductor device and fabrication method thereof

Metal gate structure

Metal gate structure

Semiconductor device and manufacturing method thereof

FinFET having a work function material gradient

Semiconductor device and manufacturing method thereof

Semiconductor device and fabrication method thereof

Semiconductor device and manufacturing method thereof

FinFET having a work function material gradient

Etching back and selective deposition of metal gate

Contact structures in semiconductor devices

Semiconductor device with multi-threshold gate structure

Metal gate structure

Metal gate structure

Method of forming metal gate electrode

NAT SEMICONDUCTOR CORP

Leadframe panel

Methods and systems of packaging integrated circuits

TO263 device package having low moisture sensitivity

Leadframe panel for power packages

Optical leadless leadframe package

Sawn power package

Sawn power package and method of fabricating same

Low stress cavity package

LIM PENG-SOON

Method of fabricating gate structures

Metal gate structure

Method and system for metal gate formation with wider metal gate fill margin

Metal gate structure of a field effect transistor

Gate structures

Method and system for metal gate formation with wider metal gate fill margin

TAIWAN SEMICONDUCTOR MFG

Method for forming metal gates in a gate last process

Multi-metal-oxide high-K gate dielectrics

Gate structures

Method of forming integrated circuit devices having n-MOSFET and p-MOSFET transistors with elevated and silicided source/drain structures

Method of making a gate structure

Metal gate electrode of a field effect transistor

LI FELIX C

Delamination resistant device package having low moisture sensitivity

Delamination resistant device package having raised bond surface and mold locking aperture

MASUOKA YURI

Transistor performance with metal gate

HOU CHENG-HAO

Metal gate electrode of a field effect transistor

LIN SHUN WU

Method of controlling gate thickness in forming FinFET devices

NG MELISSA MEI CHING

Clip frame semiconductor packages and methods of formation thereof