Inventor
HANLEY BRIAN PATRICK
US4 patents
Patents
4 patentsUS6578130B2Jun 10, 2003
Programmable data prefetch pacing
IBM35 citations91
US6240489B1May 29, 2001
Method for implementing a pseudo least recent used (LRU) mechanism in a four-way cache memory within a data processing system
IBM28 citations91
US6338120B1Jan 8, 2002
Apparatus for cache use history encoding and decoding including next lru and next mru and method therefor
IBM22 citations89
US7516275B2Apr 7, 2009
Pseudo-LRU virtual counter for a locking cache
IBM3 citations60