Inventor

NAH JAE-WOONG

US138 patents

⚠️ This page may combine multiple inventors who share the name “NAH JAE-WOONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NAH JAE-WOONG

IBM

Double solder bumps on substrates for low temperature flip chip bonding

Three dimensional self-alignment of flip chip assembly using solder surface tension during solder reflow

Thermo-compression bonded electrical interconnect structure and method

Semiconductor structure with solder bumps

Electrical interconnect structure and method

Via and trench filling using injection molded soldering

Injection molded solder method for forming solder bumps on substrates

Stud bumps for post-measurement qubit frequency modification

High speed handling of ultra-small chips by selective laser bonding and debonding

Bonding substrates using solder surface tension during solder reflow for three dimensional self-alignment of substrates

Optimized solder pads for microelectronic components

Copper post solder bumps on substrates

Copper post solder bumps on substrates

Copper post solder bumps on substrates

Underfill material dispensing for stacked semiconductor chips

Forming an array of metal balls or shapes on a substrate

Flip chip assembly method employing post-contact differential heating

Die level integrated interconnect decal manufacturing method and apparatus

Thermo-compression bonded electrical interconnect structure and method

Pressurized underfill cure

Sprocket opening alignment process and apparatus for multilayer solder decal

Techniques for arranging solder balls and forming bumps

System and method for forming solder bumps

Via and trench filling using injection molded soldering

Via and trench filling using injection molded soldering

Modular, frequency-flexible, superconducting quantum processor architecture

Flip chip assembly of quantum computing devices

Ball grid array and land grid array assemblies fabricated using temporary resist

Solder bumps formed on wafers using preformed solder balls with different compositions and sizes

Wafer level overmold for three dimensional surfaces

Ball grid array and land grid array assemblies fabricated using temporary resist

Cold-welded flip chip interconnect structure

GRUBER PETER A

Double solder bumps on substrates for low temperature flip chip bonding

Metal cored solder decal structure and process

Direct IMS (injection molded solder) without a mask for forming solder bumps on substrates

Spherical solder reflow method

Wafer level integrated interconnect decal and manufacturing method thereof

FEGER CLAUDIUS

No flow underfill or wafer level underfill and solder columns

Injection molded solder process for forming solder bumps on substrates

NAH JAE-WOONG

Copper post solder bumps on substrate

BUCHWALTER STEPHEN L

Micro-fluidic injection molded solder (IMS)

KOREA ADVANCED INST SCI & TECH

Method for forming flip chip bump and UBM for high speed copper interconnect chip using electroless plating method

DANG BING

Three dimensional flip chip system and method

GAYNES MICHAEL A

Flip chip bonder head for forming a uniform fillet

FURMAN BRUCE K

Thermo-compression bonded electrical interconnect structure and method

INTERNAT BUSINSS MACHINES CORP

Micro-fluidic injection molded solder (IMS)

BROFMAN PETER J

Flip chip assembly apparatus employing a warpage-suppressor assembly

MCLEOD MARK H

IMS (injection molded solder) with two resist layers forming solder bumps on substrates

INDYK RICHARD F

Wafer dicing employing edge region underfill removal

GLOBALFOUNDRIES INC

Visualization of alignment marks on a chip covered by a pre-applied underfill