Inventor

CHIU ANTHONY M

US68 patents

⚠️ This page may combine multiple inventors who share the name “CHIU ANTHONY M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHIU ANTHONY M

ST MICROELECTRONICS INC

Low stress and low profile cavity down flip chip and wire bond BGA package

Silver metallization by damascene method

Apparatus and method for automating the underfill of flip-chip devices

Low-profile socketed packaging system with land-grid array and thermally conductive slug

Static charge dissipation for an active circuit surface

Apparatus and method for automating the underfill of flip-chip devices

Low-profile socketed packaging system with land-grid array and thermally conductive slug

Method for using a pre-formed film in a transfer molding process for an integrated circuit

Integrated circuit package with exposed die surfaces and auxiliary attachment

System and method for direct convective cooling of an exposed integrated circuit die surface

Integrated lid formed on MEMS device

Surface mount package with integral electro-static charge dissipating ring using lead frame as ESD device

Surface mount package with integral electro-static charge dissipating ring using lead frame as ESD device

Integrated circuit device with exposed upper and lower die surfaces

Plastic pin grid array package

System and method for venting pressure from an integrated circuit package sealed with a lid

Thermally enhanced chip scale package

Method of eliminating uncontrolled voids in sheet adhesive layer

Silver metallization by damascene method

Packaging and mounting of spherical semiconductor devices

Apparatus and method for detecting the height above a silicon surface

Method for providing a redistribution metal layer in an integrated circuit

Fuel cell device

Method of making optical elements for an optical disc system

System and method for increasing the strength of a bond made by a small diameter wire in ball bonding

Integrated optical unit for use with miniature optical discs

Method of eliminating uncontrolled voids in sheet adhesive layer

System and method for increasing the strength of a bond made by a small diameter wire in ball bonding

TEXAS INSTRUMENTS INC

Semiconductor device having die pad locking to substantially reduce package cracking

Wafer burn-in and test system

Wafer burn-in and test system

Wafer burn-in and test system

Folded bus bar leadframe and method of making

Three dimensional multi-chip module with integral heat sink

Folded bus bar leadframe

Chip on board assembly

Vertical lead-on-chip package

Low cost erasable programmable read only memory package

Integrated circuit device having improved post for surface-mount package

Apparatus for testing a plurality of integrated circuits in parallel

Low cost erasable programmable read only memory package

Ball contact for flip-chip device

Ball contact for flip-chip devices

Process for manufacturing a lead frame

Integrated circuit device having improved post for surface-mount package

Semiconductor lead planarity checker

Design of integrated circuit package using parametric solids modeller

SGS THOMSON MICROELECTRONICS

Low-profile socketed packaging system with land-grid array and thermally conductive slug

SYCHIP INC

Integrated passive devices

STMICROELETRONICS INC

Leadframeless package structure and method