Inventor

PAGAILA REZA A

SG151 patents

⚠️ This page may combine multiple inventors who share the name “PAGAILA REZA A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PAGAILA REZA A

PAGAILA REZA A

Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die

Semiconductor device including pre-fabricated shielding frame disposed over semiconductor die

Semiconductor device and method of forming dual-active sided semiconductor die in fan-out wafer level chip scale package

Semiconductor device and method of forming WLP with semiconductor die embedded within penetrable encapsulant between TSV interposers

Semiconductor device and method of forming RDL along sloped side surface of semiconductor die for z-direction interconnect

Semiconductor device and method of providing Z-interconnect conductive pillars with inner polymer core

Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor die

Semiconductor device and method of forming FO-WLCSP with discrete semiconductor components mounted under and over semiconductor die

Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die

Semiconductor device and method of mounting die with TSV in cavity of substrate for electrical interconnect of Fi-PoP

Semiconductor device and method of forming vertical interconnect structure using stud bumps

Semiconductor device and method of providing z-interconnect conductive pillars with inner polymer core

Semiconductor device and method of forming WLP with semiconductor die embedded within penetrable encapsulant between TSV interposers

Semiconductor device and method of forming interposer with opening to contain semiconductor die

Semiconductor device and method of forming openings in thermally-conductive frame of FO-WLCSP to dissipate heat and reduce package height

Through hole vias at saw streets including protrusions or recesses for interconnection

Semiconductor device and method of forming TMV and TSV in WLCSP using same carrier

Making a semiconductor device having conductive through organic vias

Semiconductor device and method of shielding semiconductor die from inter-device interference

Semiconductor device and method of forming stepped interposer for stacking and electrically connecting semiconductor die

Semiconductor device and method of forming shielding layer over semiconductor die mounted to TSV interposer

Semiconductor device and method of forming through vias with reflowed conductive material

Semiconductor device and method of forming interposer and opposing build-up interconnect structure with connecting conductive TMV for electrical interconnect of Fo-WLCSP

Semiconductor device and method of forming base leads from base substrate as standoff for stacking semiconductor die

Semiconductor device and method of forming shielding layer over semiconductor die mounted to TSV interposer

Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation

Semiconductor device and method of stacking die on leadframe electrically connected by conductive pillars

Semiconductor device and method of forming prefabricated EMI shielding frame with cavities containing penetrable material over semiconductor die

Semiconductor device and method of mounting pre-fabricated shielding frame over semiconductor die

STATS CHIPPAC LTD

Semiconductor device and method of forming different height conductive pillars to electrically interconnect stacked laterally offset semiconductor die

Semiconductor device and method of forming conductive TSV with insulating annular ring

Semiconductor device and method of dual-molding die formed on opposite sides of build-up interconnect structures

Method and apparatus for thermally enhanced semiconductor package

Semiconductor device and method of forming a 3D inductor from prefabricated pillar frame

Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure

Semiconductor device having electrical devices mounted to IPD structure and method for shielding electromagnetic interference

Semiconductor device and method of forming through vias with reflowed conductive material

Semiconductor device and method of forming double-sided through vias in saw streets

Semiconductor device and method of forming shielding along a profile disposed in peripheral region around the device

Semiconductor device and method of forming embedded passive circuit elements interconnected to through hole vias

Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect

Semiconductor device and method of forming different height conductive pillars to electrically interconnect stacked laterally offset semiconductor die

Semiconductor device and method of forming a shielding layer between stacked semiconductor die

Semiconductor device and method of forming cavity in build-up interconnect structure for short signal path between die

Semiconductor device and method of forming air gap adjacent to stress sensitive region of the die

Semiconductor device and method of forming dam material around periphery of die to reduce warpage

Semiconductor device and method of forming shielding along a profile disposed in peripheral region around the device

Semiconductor device and method of forming embedded passive circuit elements interconnected to through hole vias

CHUA LINDA PEI EE

Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant

DO BYUNG TAI

Semiconductor device and method of forming bond wires and stud bumps in recessed region of peripheral area around the device for electrical interconnection to other devices