Inventor
LOOK KEVIN T
US30 patents
⚠️ This page may combine multiple inventors who share the name “LOOK KEVIN T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
29 patentsUS5970372AOct 19, 1999
Method of forming multilayer amorphous silicon antifuse
XILINX INC46 citations95
US5726484AMar 10, 1998
Multilayer amorphous silicon antifuse
XILINX INC61 citations95
US5502000AMar 26, 1996
Method of forming a antifuse structure with increased breakdown at edges
XILINX INC43 citations94
US5486707AJan 23, 1996
Antifuse structure with double oxide layers
XILINX INC52 citations94
US5475253ADec 12, 1995
Antifuse structure with increased breakdown at edges
XILINX INC48 citations94
US7504854B1Mar 17, 2009
Regulating unused/inactive resources in programmable logic devices for static power reduction
XILINX INC29 citations93
US6563320B1May 13, 2003
Mask alignment structure for IC layers
XILINX INC21 citations92
US6549458B1Apr 15, 2003
Non-volatile memory array using gate breakdown structures
XILINX INC25 citations92
US6522582B1Feb 18, 2003
Non-volatile memory array using gate breakdown structures
XILINX INC20 citations92
US6496416B1Dec 17, 2002
Low voltage non-volatile memory cell
XILINX INC41 citations92
US6426534B1Jul 30, 2002
Methods and circuits employing threshold voltages for mask-alignment detection
XILINX INC25 citations92
US6393714B1May 28, 2002
Resistor arrays for mask-alignment detection
XILINX INC39 citations92
US6305095B1Oct 23, 2001
Methods and circuits for mask-alignment detection
XILINX INC25 citations92
US6569576B1May 27, 2003
Reticle cover for preventing ESD damage
XILINX INC22 citations91
US7092273B2Aug 15, 2006
Low voltage non-volatile memory transistor
XILINX INC14 citations84
US6982451B1Jan 3, 2006
Single event upset in SRAM cells in FPGAs with high resistivity gate structures
XILINX INC15 citations84
US6936527B1Aug 30, 2005
Low voltage non-volatile memory cell
XILINX INC13 citations84
US6930920B1Aug 16, 2005
Low voltage non-volatile memory cell
XILINX INC12 citations84
US6882571B1Apr 19, 2005
Low voltage non-volatile memory cell
XILINX INC14 citations84
US6671205B2Dec 30, 2003
Low voltage non-volatile memory cell
XILINX INC14 citations84
US6716653B2Apr 6, 2004
Mask alignment structure for IC layers
XILINX INC16 citations83
US7026692B1Apr 11, 2006
Low voltage non-volatile memory transistor
XILINX INC9 citations74
US6465305B1Oct 15, 2002
Methods and circuits employing threshold voltages for mask-alignment detection
XILINX INC8 citations73
US6436726B2Aug 20, 2002
Methods and circuits for mask-alignment detection
XILINX INC11 citations73
US5786240AJul 28, 1998
Method for over-etching to improve voltage distribution
XILINX INC15 citations73
US7452765B1Nov 18, 2008
Single event upset in SRAM cells in FPGAs with high resistivity gate structures
XILINX INC3 citations62
US6878561B2Apr 12, 2005
Mask-alignment detection circuit in X and Y directions
XILINX INC5 citations62
US6684520B1Feb 3, 2004
Mask-alignment detection circuit in x and y directions
XILINX INC4 citations62
US6057589AMay 2, 2000
Method for over-etching to improve voltage distribution
XILINX INC2 citations62