Inventor
WU TIE-JIANG
TW15 patents
⚠️ This page may combine multiple inventors who share the name “WU TIE-JIANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NANYA TECHNOLOGY CORP
14 patentsUS7026647B2Apr 11, 2006
Device and method for detecting alignment of active areas and memory cell structures in DRAM devices
NANYA TECHNOLOGY CORP11 citations84
US6902942B2Jun 7, 2005
Device and method for detecting alignment of deep trench capacitors and word lines in DRAM devices
NANYA TECHNOLOGY CORP12 citations84
US6693834B1Feb 17, 2004
Device and method for detecting alignment of bit lines and bit line contacts in DRAM devices
NANYA TECHNOLOGY CORP13 citations84
US6891216B1May 10, 2005
Test structure of DRAM
NANYA TECHNOLOGY CORP11 citations73
US7381575B2Jun 3, 2008
Device and method for detecting alignment of active areas and memory cell structures in DRAM devices
NANYA TECHNOLOGY CORP2 citations62
US7217581B2May 15, 2007
Misalignment test structure and method thereof
NANYA TECHNOLOGY CORP4 citations62
US6984534B2Jan 10, 2006
Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal
NANYA TECHNOLOGY CORP2 citations62
US6946678B2Sep 20, 2005
Test key for validating the position of a word line overlaying a trench capacitor in DRAMs
NANYA TECHNOLOGY CORP4 citations62
US6838296B2Jan 4, 2005
Device and method for detecting alignment of deep trench capacitors and active areas in DRAM devices
NANYA TECHNOLOGY CORP3 citations62
US6801462B2Oct 5, 2004
Device and method for detecting alignment of deep trench capacitors and word lines in DRAM devices
NANYA TECHNOLOGY CORP5 citations62
US6812487B1Nov 2, 2004
Test key and method for validating the doping concentration of buried layers within a deep trench capacitors
NANYA TECHNOLOGY CORP4 citations60
US6788598B2Sep 7, 2004
Test key for detecting overlap between active area and deep trench capacitor of a DRAM and detection method thereof
NANYA TECHNOLOGY CORP3 citations60
US6844207B2Jan 18, 2005
Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal
NANYA TECHNOLOGY CORP1 citations52
US6825053B2Nov 30, 2004
Test key and method for validating the position of a word line overlaying a trench capacitor in DRAMS
NANYA TECHNOLOGY CORP0 citations52