Inventor
KARDACH JAMES P
US62 patents
⚠️ This page may combine multiple inventors who share the name “KARDACH JAMES P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
44 patentsUS7454632B2Nov 18, 2008
Reducing computing system power through idle synchronization
INTEL CORP221 citations99
US6018803AJan 25, 2000
Method and apparatus for detecting bus utilization in a computer system based on a number of bus events per sample period
INTEL CORP162 citations99
US7461275B2Dec 2, 2008
Dynamic core swapping
INTEL CORP66 citations98
US7080271B2Jul 18, 2006
Non main CPU/OS based operational environment
INTEL CORP79 citations98
US5884088AMar 16, 1999
System, apparatus and method for managing power in a computer system
INTEL CORP166 citations97
US5692202ANov 25, 1997
System, apparatus, and method for managing power in a computer system
INTEL CORP146 citations97
US7114090B2Sep 26, 2006
Computing system with operational low power states
INTEL CORP59 citations96
US6125450ASep 26, 2000
Stop clock throttling in a computer processor through disabling bus masters
INTEL CORP86 citations96
US5655127AAug 5, 1997
Method and apparatus for control of power consumption in a computer system
INTEL CORP94 citations96
US5925135AJul 20, 1999
Clock rate compensation for a low frequency slave device
INTEL CORP86 citations95
US5909696AJun 1, 1999
Method and apparatus for caching system management mode information with other information
INTEL CORP55 citations95
US5729762AMar 17, 1998
Input output controller having interface logic coupled to DMA controller and plurality of address lines for carrying control information to DMA agent
INTEL CORP55 citations95
US5560001ASep 24, 1996
Method of operating a processor at a reduced speed
INTEL CORP45 citations95
US5473767ADec 5, 1995
Method and apparatus for asynchronously stopping the clock in a processor
INTEL CORP34 citations95
US7116938B2Oct 3, 2006
Method and apparatus for mitigating radio frequency interference between transceiver systems
INTEL CORP48 citations94
US5862387AJan 19, 1999
Method and apparatus for handling bus master and direct memory access (DMA) requests at an I/O controller
INTEL CORP83 citations94
US5798951AAug 25, 1998
Method and apparatus for automatic un-preconditioned insertion/removal capability between a notebook computer and a docking station
INTEL CORP76 citations94
US5446906AAug 29, 1995
Method and apparatus for suspending and resuming a keyboard controller
INTEL CORP80 citations94
US7454639B2Nov 18, 2008
Various apparatuses and methods for reduced power states in system memory
INTEL CORP39 citations93
US7165134B1Jan 16, 2007
System for selectively generating real-time interrupts and selectively processing associated data when it has higher priority than currently executing non-real-time operation
INTEL CORP34 citations93
US5889964AMar 30, 1999
Method and apparatus for docking and undocking a notebook computer to and from a docking station while the notebook computer is in an active state
INTEL CORP70 citations93
US5664197ASep 2, 1997
Method and apparatus for handling bus master channel and direct memory access (DMA) channel access requests at an I/O controller
INTEL CORP71 citations93
US8949633B2Feb 3, 2015
Dynamic core swapping
INTEL CORP15 citations92
US7430673B2Sep 30, 2008
Power management system for computing platform
INTEL CORP50 citations92
US7428650B2Sep 23, 2008
Non main CPU/OS based operational environment
INTEL CORP18 citations92
US7403512B2Jul 22, 2008
Service discovery architecture and method for wireless networks
INTEL CORP26 citations92
US5898859AApr 27, 1999
Address shadow feature and methods of using the same
INTEL CORP29 citations92
US5862389AJan 19, 1999
Method and apparatus for selectively invoking a particular interrupt service routine for a particular interrupt request
INTEL CORP29 citations92
US5560002ASep 24, 1996
Method of testing a microprocessor by masking of an internal clock signal
INTEL CORP26 citations92
US5465367ANov 7, 1995
Slow memory refresh in a computer with a limited supply of power
INTEL CORP88 citations92
US5862349AJan 19, 1999
Method and apparatus for docking and undocking a notebook computer
INTEL CORP50 citations91
US5630147AMay 13, 1997
System management shadow port
INTEL CORP26 citations91
US5621900AApr 15, 1997
Method and apparatus for claiming bus access from a first bus to a second bus prior to the subtractive decode agent claiming the transaction without decoding the transaction
INTEL CORP42 citations91
US7194283B2Mar 20, 2007
Method and apparatus for communication using multiple communication protocols
INTEL CORP32 citations90
US6014751AJan 11, 2000
Method and apparatus for maintaining cache coherency in an integrated circuit operating in a low power state
INTEL CORP48 citations89
US7093149B2Aug 15, 2006
Tiered secondary memory architecture to reduce power consumption in a portable computer system
INTEL CORP37 citations87
US7631199B2Dec 8, 2009
Various methods and apparatuses for power states in a controller
INTEL CORP14 citations84
US7406610B2Jul 29, 2008
Computing system with low power states and proxy for integration with legacy application software
INTEL CORP11 citations84
US6567414B2May 20, 2003
Method and apparatus for exiting a deadlock condition
INTEL CORP15 citations84
US7590101B2Sep 15, 2009
Remote operations using wireless personal area network
INTEL CORP12 citations83
US7598959B2Oct 6, 2009
Display controller
INTEL CORP7 citations74
US5793961AAug 11, 1998
Computer system with data conference capability
INTEL CORP11 citations74
US7421597B2Sep 2, 2008
Computing system with operational low power states
INTEL CORP5 citations73
US5918043AJun 29, 1999
Method and apparatus for asynchronously stopping the clock in a processor
INTEL CORP10 citations73
KARDACH JAMES P
2 patents(unassigned)
1 patentINTOL CORP
1 patentKWA SEH W
1 patentBELMONT BRIAN V
1 patentShowing the top 50 of 62 patents by PatentIndex Score.