Inventor

TAY LIONEL CHIEN HUI

SG110 patents

⚠️ This page may combine multiple inventors who share the name “TAY LIONEL CHIEN HUI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAY LIONEL CHIEN HUI

STATS CHIPPAC LTD

Integrated circuit package system with leadframe array

Leadframe design for QFN package with top terminal leads

Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device

Stackable integrated circuit package system with recess

Method of forming a wafer level package with RDL interconnection over encapsulant between bump and semiconductor die

Semiconductor device and method of forming through hole vias in die extension region around periphery of die

Wirebondless wafer level package with plated bumps and interconnects

Semiconductor wafer level interconnect package utilizing conductive ring and pad for separate voltage supplies and method of making the same

Method and apparatus for a package having multiple stacked die

Integrated circuit package system with redistribution layer

Integrated circuit packaging system with increased connectivity and method of manufacture thereof

Multi-layer package-on-package system

Integrated circuit package system with dual connectivity

Integrated circuit packaging system with exposed terminal interconnects and method of manufacturing thereof

Multi-chip package system with multiple substrates

Integrated circuit packaging system with interconnect and method of manufacture thereof

Semiconductor device and method of providing a thermal dissipation path through RDL and conductive via

Integrated circuit package system with shielding

Semiconductor package and method of forming similar structure for top and bottom bonding pads

Semiconductor package system with die support pad

Integrated circuit package system with top and bottom terminals

Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof

Wire-on-lead package system having leadfingers positioned between paddle extensions and method of manufacture thereof

Mountable integrated circuit package system with substrate

Leadframe design for QFN package with top terminal leads

Integrated circuit package system with isloated leads

Optical semiconductor device having pre-molded leadframe with window and method therefor

CAMACHO ZIGMUND R

Semiconductor device and method of forming PIP with inner known good die interconnected with conductive bumps

Semiconductor device and method of forming package-on-package structure electrically interconnected through TSV in WLCSP

Wafer level die integration and method

Semiconductor device and method of forming PiP with inner known good die interconnected with conductive bumps

Semiconductor device and method of forming wafer level die integration

System and apparatus for wafer level integration of components

Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device

CAMACHO ZIGMUND RAMIREZ

Packaging system with hollow package and method for the same

Integrated circuit package system with concave terminal

Integrated circuit package system with shield and tie bar

Fan-in interposer on lead frame for an integrated circuit package on package system

Integrated circuit packaging system with cap layer and method of manufacture thereof

Integrated circuit packaging system with plated leads and method of manufacture thereof

Etched recess package on package system

BATHAN HENRY DESCALZO

Integrated circuit package system with integration port

Integrated circuit package in package system with adhesiveless package attach

Semiconductor device and method of forming through hole vias in die extension region around periphery of die

TAY LIONEL CHIEN HUI

Integrated circuit packaging system with flipchip leadframe and method of manufacture thereof

Semiconductor package system with cut multiple lead pads

PAGAILA REZA A

Through hole vias at saw streets including protrusions or recesses for interconnection

Through hole vias at saw streets including protrusions or recesses for interconnection

BADAKERE GURUPRASAD G

Semiconductor device and method of forming wafer level ground plane and power ring

DAHILIG FREDERICK R

Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die