Inventor

STACKHOUSE BLAINE

US7 patents

⚠️ This page may combine multiple inventors who share the name “STACKHOUSE BLAINE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HEWLETT PACKARD DEVELOPMENT CO

2 patents

US6728823B1Apr 27, 2004

Cache connection with bypassing feature

HEWLETT PACKARD DEVELOPMENT CO45 citations91

US7133319B2Nov 7, 2006

Programmable weak write test mode (PWWTM) bias generation having logic high output default mode

HEWLETT PACKARD DEVELOPMENT CO6 citations62

INTEL CORP

2 patents

US7992017B2Aug 2, 2011

Methods and apparatuses for reducing step loads of processors

INTEL CORP34 citations89

US8886979B2Nov 11, 2014

Methods and apparatuses for reducing step loads of processors

INTEL CORP1 citations59

HEWLETT PACKARD CO

2 patents

US5740000AApr 14, 1998

ESD protection system for an integrated circuit with multiple power supply networks

HEWLETT PACKARD CO28 citations88

US6185148B1Feb 6, 2001

General purpose decode implementation for multiported memory array circuits

HEWLETT PACKARD CO0 citations50

SAFFORD KEVIN

1 patent

US8479029B2Jul 2, 2013

Methods and apparatuses for reducing step loads of processors

SAFFORD KEVIN12 citations77