Inventor

JANG JAEHOON

KR61 patents

⚠️ This page may combine multiple inventors who share the name “JANG JAEHOON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JANG JAEHOON

SAMSUNG ELECTRONICS CO LTD

Three-dimensional nonvolatile memory devices having sub-divided active bars and methods of manufacturing such devices

Three-dimensional semiconductor memory device and a method of fabricating the same

Three-dimensional semiconductor devices

Non-volatile memory devices, operating methods thereof and memory systems including the same

Nonvolatile memory devices having vertically integrated nonvolatile memory cell sub-strings therein

Vertically-integrated nonvolatile memory devices having laterally-integrated ground select transistors

Three-dimensional semiconductor device and method for fabricating the same

Nonvolatile memory devices and operating methods thereof

Non-volatile memory device having vertical structure and method of operating the same

Vertically-integrated nonvolatile memory devices having laterally-integrated ground select transistors

Semiconductor memory devices having selection transistors with nonuniform threshold voltage characteristics

Three-dimensional nonvolatile memory and operating method of three-dimensional nonvolatile memory

Operating methods of nonvolatile memory devices including a ground select transistor and first and second dummy memory cells

Three-dimensional semiconductor device

Hinge assembly and electronic device including the same

Three-dimensional semiconductor memory device and method of operating the same

Three-dimensional semiconductor memory device

Three-dimensional semiconductor memory device

SHIM SUNIL

Non-volatile memory devices, operating methods thereof and memory systems including the same

Three-dimensional semiconductor memory device and a method of fabricating the same

Three-dimensional semiconductor memory device

Vertically-integrated nonvolatile memory devices having laterally-integrated ground select transistors

Integrated circuit memory devices having selection transistors with nonuniform threshold voltage characteristics

Three-dimensional semiconductor memory device

Nonvolatile memory devices, erasing methods thereof and memory systems including the same

Method of forming a three-dimensional semiconductor memory device comprising sub-cells, terraced structures and strapping regions

Nonvolatile memory device and method of reading the same using different precharge voltages

Three-dimensional memory device

HWANG SUNG-MIN

Methods of manufacturing three-dimensional semiconductor devices and related devices

Semiconductor device with a pick-up region

Semiconductor device and method of fabricating the same

Three-dimensional semiconductor memory device

JEONG JAEHUN

Semiconductor device and method of forming the same

Nonvolatile memory devices having a three dimensional structure

Nonvolatile memory devices having a three dimensional structure

Nonvolatile memory device

CHOE BYEONG-IN

Erasing methods of three-dimensional nonvolatile memory devices with cell strings and dummy word lines

Operating method of nonvolatile memory device

Nonvolatile memory device and method of making the same

LEE CHANGHYUN

Methods of forming nonvolatile memory devices having vertically integrated nonvolatile memory cell sub-strings therein

Nonvolatile memory devices having vertically integrated nonvolatile memory cell sub-strings therein

LEE WOOKHYOUNG

Semiconductor device having staggered pillars

Semiconductor device

KIM KINAM

Three-dimensional non-volatile memory devices having highly integrated string selection and sense amplifier circuits therein

HAN JINMAN

Nonvolatile memory device, operating method thereof, and memory system including the same

KIM DOOGON

Non-volatile memory device having vertical structure and method of operating the same

OH JIN-YONG

Three-dimensional nonvolatile memory devices having sub-divided active bars and methods of manufacturing such devices

SHIM JAE-JOO

Three-dimensional semiconductor device including a mold structure providing gap regions and an interconnection structure including a plurality of interconnection patterns formed in the gap regions

KIM KIHYUN

Nonvolatile memory devices, read methods thereof and memory systems including the nonvolatile memory devices

HL MANDO CORP

Electro-mechanical brake system and controlling method thereof