Inventor
JADHAV VIRENDRA R
US23 patents
⚠️ This page may combine multiple inventors who share the name “JADHAV VIRENDRA R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
15 patentsUS7812438B2Oct 12, 2010
Via offsetting to reduce stress under the first level interconnect (FLI) in microelectronics packaging
IBM21 citations92
US6703704B1Mar 9, 2004
Stress reducing stiffener ring
IBM35 citations92
US11244917B2Feb 8, 2022
Multilayer pillar for reduced stress interconnect and method of making same
IBM4 citations84
US10403590B2Sep 3, 2019
Multilayer pillar for reduced stress interconnect and method of making same
IBM4 citations84
US10396051B2Aug 27, 2019
Multilayer pillar for reduced stress interconnect and method of making same
IBM3 citations84
US9366591B2Jun 14, 2016
Determining magnitude of compressive loading
IBM10 citations84
US7875972B2Jan 25, 2011
Semiconductor device assembly having a stress-relieving buffer layer
IBM10 citations84
US11171102B2Nov 9, 2021
Multilayer pillar for reduced stress interconnect and method of making same
IBM0 citations62
US11094657B2Aug 17, 2021
Multilayer pillar for reduced stress interconnect and method of making same
IBM0 citations62
US7088008B2Aug 8, 2006
Electronic package with optimized circuitization pattern
IBM4 citations62
US7952207B2May 31, 2011
Flip-chip assembly with organic chip carrier having mushroom-plated solder resist opening
IBM2 citations56
US9640501B2May 2, 2017
Multilayer pillar for reduced stress interconnect and method of making same
IBM0 citations52
US10699972B2Jun 30, 2020
Flat laminate, symmetrical test structures and method of use to gauge white bump sensitivity
IBM0 citations51
US9899279B2Feb 20, 2018
Flat laminate, symmetrical test structures and method of use to gauge white bump sensitivity
IBM0 citations51
US7819027B2Oct 26, 2010
Method and structure for a pull test for controlled collapse chip connections and ball limiting metallurgy
IBM0 citations42
JADHAV VIRENDRA R
3 patentsUS9472520B2Oct 18, 2016
Multilayer pillar for reduced stress interconnect and method of making same
JADHAV VIRENDRA R14 citations91
US8293587B2Oct 23, 2012
Multilayer pillar for reduced stress interconnect and method of making same
JADHAV VIRENDRA R9 citations91
US9111816B2Aug 18, 2015
Multilayer pillar for reduced stress interconnect and method of making same
JADHAV VIRENDRA R0 citations51