Inventor

JAPP ROBERT M

US41 patents

⚠️ This page may combine multiple inventors who share the name “JAPP ROBERT M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JAPP ROBERT M

IBM

Low CTE power and ground planes

Porous power and ground planes for reduced PCB delamination and better reliability

Flame retardant, low dielectric constant microsphere filled laminate

Electronic package with high density interconnect layer

Method for making printed circuit board having low coefficient of thermal expansion power/ground plane

Laminate circuit structure and method of fabricating

Formation of multisegmented plated through holes

Laminate circuit structure and method of fabricating

Formation of multisegmented plated through holes

Multilayer capacitance structure and circuit board containing the same

Laminate and method of manufacture thereof

Porous power and ground planes for reduced PCB delamination and better reliability

Method of making a multi-layered interconnect structure

Chip C4 assembly improvement using magnetic force and adhesive

Laser segmentation of plated through-hole sidewalls to form multiple conductors

Fluid jet impregnation

Method of fabricating a laminate circuit structure

Circuit package having low modulus, conformal mounting pads

Process of laminating a photosensitive layer of a substrate

Multilayer capacitance structure and circuit board containing the same and method of forming the same

Formation of multisegmented plated through holes

Method and structure for small pitch z-axis electrical interconnections

Method and structure for small pitch z-axis electrical interconnections

Chip C4 assembly improvement using magnetic force and adhesive

Process of heat treating and annealing CIC and CIC created thereby

UV absorbing glass cloth and use thereof

Resin composition with a polymerizing agent and method of manufacturing prepreg and other laminate structures therefrom

Drill stack formation

Drill stack formation

ENDICOTT INTERCONNECT TECH INC

Low moisture absorptive circuitized substrate with reduced thermal expansion, method of making same, electrical assembly utilizing same, and information handling system utilizing same

Halogen-free circuitized substrate with reduced thermal expansion, method of making same, multilayered substrate structure utilizing same, and information handling system utilizing same

Multilayered circuitized substrate with p-aramid dielectric layers and method of making same

Method of providing a printed circuit board with an edge connection portion and/or a plurality of cavities therein

Method of making same low moisture absorptive circuitized substrave with reduced thermal expansion

Fluoropolymer dielectric composition for use in circuitized substrates and circuitized substrate including same

Method of making circuitized substrate

Dielectric composition for use in circuitized substrates and circuitized substrate including same

JAPP ROBERT M

Power core for use in circuitized substrate and method of making same

Multilayered circuitized substrate with P-aramid dielectric layers and method of making same

Circuitized substrate with continuous thermoplastic support film dielectric layers

Method of making halogen-free circuitized substrate with reduced thermal expansion