Inventor
DOWECK JACOB
IL26 patents
⚠️ This page may combine multiple inventors who share the name “DOWECK JACOB”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
21 patentsUS7590825B2Sep 15, 2009
Counter-based memory disambiguation techniques for selectively predicting load/store conflicts
INTEL CORP41 citations94
US6560671B1May 6, 2003
Method and apparatus for accelerating exchange or swap instructions using a register alias table (RAT) and content addressable memory (CAM) with logical register numbers as input addresses
INTEL CORP46 citations92
US6470435B2Oct 22, 2002
Dual state rename recovery using register usage
INTEL CORP20 citations92
US5928352AJul 27, 1999
Method and apparatus for implementing a fully-associative translation look-aside buffer having a variable numbers of bits representing a virtual address entry
INTEL CORP33 citations92
US5860147AJan 12, 1999
Method and apparatus for replacement of entries in a translation look-aside buffer
INTEL CORP51 citations92
US11030113B1Jun 8, 2021
Apparatus and method for efficient process-based compartmentalization
INTEL CORP7 citations84
US12021980B2Jun 25, 2024
Restricting usage of encryption keys by untrusted software
INTEL CORP2 citations72
US11681530B2Jun 20, 2023
Apparatuses, methods, and systems for hashing instructions
INTEL CORP1 citations72
US11567772B2Jan 31, 2023
Apparatuses, methods, and systems for hashing instructions
INTEL CORP1 citations72
US11188335B2Nov 30, 2021
Apparatuses, methods, and systems for hashing instructions
INTEL CORP1 citations72
US11139967B2Oct 5, 2021
Restricting usage of encryption keys by untrusted software
INTEL CORP3 citations72
US9164917B2Oct 20, 2015
Linear to physical address translation with support for page attributes
INTEL CORP2 citations63
US9164916B2Oct 20, 2015
Linear to physical address translation with support for page attributes
INTEL CORP2 citations63
US11741018B2Aug 29, 2023
Apparatus and method for efficient process-based compartmentalization
INTEL CORP0 citations62
US11461244B2Oct 4, 2022
Co-existence of trust domain architecture with multi-key total memory encryption technology in servers
INTEL CORP0 citations62
US11409662B2Aug 9, 2022
Apparatus and method for efficient process-based compartmentalization
INTEL CORP0 citations62
US11074191B2Jul 27, 2021
Linear to physical address translation with support for page attributes
INTEL CORP0 citations62
US12399718B2Aug 26, 2025
Apparatuses, methods, and systems for hashing instructions
INTEL CORP0 citations61
US12549331B2Feb 10, 2026
Memory bus integrity and data encryption (IDE)
INTEL CORP0 citations52
US10824428B2Nov 3, 2020
Apparatuses, methods, and systems for hashing instructions
INTEL CORP0 citations51
US10223121B2Mar 5, 2019
Method and apparatus for supporting quasi-posted loads
INTEL CORP0 citations41