Inventor

CAI JIN

US122 patents

⚠️ This page may combine multiple inventors who share the name “CAI JIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CAI JIN

IBM

Embedded DRAM integrated circuits with extremely thin silicon-on-insulator pass transistors

Monolithic integrated photonics with lateral bipolar and BiCMOS

Semiconductor-on-insulator (SOI) lateral heterojunction bipolar transistor having a wide band gap emitter/collector which are epitaxially grown

Semiconductor-on-insulator (SOI) lateral heterojunction bipolar transistor having a wide band gap emitter/collector which are epitaxially grown

CMOS EPROM and EEPROM devices and programmable CMOS inverters

EEPROM device with substrate hot-electron injector for low-power programming

EEPROM device with substrate hot-electron injector for low-power

System on chip fully-depleted silicon on insulator with rf and mm-wave integrated functions

Ultra-sensitive biosensor based on lateral bipolar junction transistor having self-aligned epitaxially grown base

Ultra-sensitive biosensor based on lateral bipolar junction transistor having self-aligned epitaxially grown base

SOI lateral bipolar transistors having surrounding extrinsic base portions

High speed bipolar junction transistor for high voltage applications

Lateral bipolar transistors having partially-depleted intrinsic base

Complementary SOI lateral bipolar for SRAM in a CMOS platform

Bulk finFET with super steep retrograde well

Metal gate structures for CMOS transistor devices having reduced parasitic capacitance

Metal gate structures for CMOS transistor devices having reduced parasitic capacitance

High performance low power bulk FET device and method of manufacture

Partially depleted SOI field effect transistor having a metallized source side halo region

Partially depleted SOI field effect transistor having a metallized source side halo region

Methods of applying substrate bias to SOI CMOS circuits

Bulk finFET with super steep retrograde well

SOI based bipolar transistor having a majority carrier accumulation layer as subcollector

Monolithic integrated photonics with lateral bipolar and BiCMOS

Structure and method for adjusting threshold voltage of the array of transistors

Semiconductor-on-insulator (SOI) lateral heterojunction bipolar transistor having an epitaxially grown base

CAI JIN

Charge sensors using inverted lateral bipolar junction transistors

Electrically programmable floating common gate CMOS device and applications thereof

Integrated circuit having back gating, improved isolation and reduced well resistance and method to fabricate same

Horizontal polysilicon-germanium heterojunction bipolar transistor

ETSOI CMOS with back gates

Germanium lateral bipolar junction transistor

Germanium lateral bipolar junction transistor

SOI lateral bipolar junction transistor having a wide band gap emitter contact

Charge sensors using inverted lateral bipolar junction transistors

Complementary bipolar inverter

ETSOI CMOS with back gates

Complementary SOI lateral bipolar for SRAM in a low-voltage CMOS platform

Vertical polysilicon-germanium heterojunction bipolar transistor

Structure and method for Vt tuning and short channel control with high k/metal gate MOSFETs

Method for fabricating super-steep retrograde well MOSFET on SOI or bulk silicon substrate, and device fabricated in accordance with the method

Graphene pressure sensors

Graphene pressure sensors

TAIWAN SEMICONDUCTOR MFG CO LTD

Memory device and multi-level memory cell having ferroelectric storage element and magneto-resistive storage element

Memory device and method thereof

Transistor with a negative capacitance and a method of creating the same

Memory device and method thereof

Transistor with a negative capacitance and a method of creating the same

GLOBALFOUNDRIES INC

Integrated finFET-BJT replacement metal gate

LUK WING K

Dynamic memory cell structures