Inventor
GREINER DAN F
US254 patents
⚠️ This page may combine multiple inventors who share the name “GREINER DAN F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
35 patentsUS9311259B2Apr 12, 2016
Program event recording within a transactional environment
IBM24 citations94
US9858082B2Jan 2, 2018
Restricted instructions in transactional execution
IBM16 citations93
US9851978B2Dec 26, 2017
Restricted instructions in transactional execution
IBM10 citations93
US9454370B2Sep 27, 2016
Conditional transaction end instruction
IBM11 citations93
US9336047B2May 10, 2016
Prefetching of discontiguous storage locations in anticipation of transactional execution
IBM16 citations93
US8935504B1Jan 13, 2015
Execution of a perform frame management function instruction
IBM11 citations93
US8909899B2Dec 9, 2014
Emulating execution of a perform frame management instruction
IBM22 citations93
US8887002B2Nov 11, 2014
Transactional execution branch indications
IBM20 citations93
US8041923B2Oct 18, 2011
Load page table entry address instruction execution based on an address translation format control field
IBM25 citations93
US7594094B2Sep 22, 2009
Move data facility with optional specifications
IBM26 citations93
US9680653B1Jun 13, 2017
Cipher message with authentication instruction
IBM19 citations92
US7895419B2Feb 22, 2011
Rotate then operate on selected bits facility and instructions therefore
IBM26 citations92
US7516304B2Apr 7, 2009
Parsing-enhancement facility
IBM15 citations92
US11150905B2Oct 19, 2021
Efficiency for coordinated start interpretive execution exit for a multithreaded processor
IBM4 citations84
US10599435B2Mar 24, 2020
Nontransactional store instruction
IBM9 citations84
US10360033B2Jul 23, 2019
Conditional transaction end instruction
IBM5 citations84
US10282327B2May 7, 2019
Test pending external interruption instruction
IBM12 citations84
US10241910B2Mar 26, 2019
Creating a dynamic address translation with translation exception qualifiers
IBM8 citations84
US10235174B2Mar 19, 2019
Conditional instruction end operation
IBM4 citations84
US10223214B2Mar 5, 2019
Randomized testing within transactional execution
IBM6 citations84
US10223154B2Mar 5, 2019
Hint instruction for managing transactional aborts in transactional memory computing environments
IBM6 citations84
US10185588B2Jan 22, 2019
Transaction begin/end instructions
IBM6 citations84
US10133575B2Nov 20, 2018
Instruction for performing a pseudorandom number generate operation
IBM5 citations84
US10078585B2Sep 18, 2018
Creating a dynamic address translation with translation exception qualifiers
IBM6 citations84
US10025589B2Jul 17, 2018
Conditional transaction end instruction
IBM4 citations84
US9996360B2Jun 12, 2018
Transaction abort instruction specifying a reason for abort
IBM9 citations84
US9983883B2May 29, 2018
Transaction abort instruction specifying a reason for abort
IBM9 citations84
US9921848B2Mar 20, 2018
Address expansion and contraction in a multithreading computer system
IBM14 citations84
US9904572B2Feb 27, 2018
Dynamic prediction of hardware transaction resource requirements
IBM7 citations84
US9860056B2Jan 2, 2018
Instruction for performing a pseudorandom number seed operation
IBM4 citations84
US9811337B2Nov 7, 2017
Transaction abort processing
IBM9 citations84
US9804847B2Oct 31, 2017
Thread context preservation in a multithreading computer system
IBM7 citations84
US9792125B2Oct 17, 2017
Saving/restoring selected registers in transactional processing
IBM13 citations84
US9727370B2Aug 8, 2017
Collecting memory operand access characteristics during transactional execution
IBM6 citations84
US9558032B2Jan 31, 2017
Conditional instruction end operation
IBM4 citations84
GREINER DAN F
10 patentsUS9317460B2Apr 19, 2016
Program event recording within a transactional environment
GREINER DAN F30 citations94
US9361115B2Jun 7, 2016
Saving/restoring selected registers in transactional processing
GREINER DAN F17 citations93
US8880959B2Nov 4, 2014
Transaction diagnostic block
GREINER DAN F25 citations93
US8688661B2Apr 1, 2014
Transactional processing
GREINER DAN F30 citations93
US8682877B2Mar 25, 2014
Constrained transaction execution
GREINER DAN F31 citations93
US8417916B2Apr 9, 2013
Perform frame management function instruction for setting storage keys and clearing blocks of main storage
GREINER DAN F22 citations93
US8151083B2Apr 3, 2012
Dynamic address translation with frame management
GREINER DAN F17 citations93
US8131934B2Mar 6, 2012
Extract cache attribute facility and instruction therefore
GREINER DAN F28 citations93
US8117417B2Feb 14, 2012
Dynamic address translation with change record override
GREINER DAN F21 citations93
US8103851B2Jan 24, 2012
Dynamic address translation with translation table entry format control for indentifying format of the translation table entry
GREINER DAN F30 citations93
GAINEY JR CHARLES W
3 patentsUS8086811B2Dec 27, 2011
Optimizations of a perform frame management function issued by pageable guests
GAINEY JR CHARLES W35 citations96
US8495326B2Jul 23, 2013
Execution of a perform frame management function instruction
GAINEY JR CHARLES W10 citations92
US8239649B2Aug 7, 2012
Clearing guest frames absent paging-in to host main storage
GAINEY JR CHARLES W13 citations90
FARRELL MARK S
1 patentCRADDOCK DAVID
1 patentShowing the top 50 of 254 patents by PatentIndex Score.