Inventor
DRAKE ALAN J
US37 patents
⚠️ This page may combine multiple inventors who share the name “DRAKE ALAN J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
30 patentsUS8704576B1Apr 22, 2014
Variable resistance switch for wide bandwidth resonant global clock distribution
IBM20 citations92
US7418641B2Aug 26, 2008
Self-resetting, self-correcting latches
IBM21 citations92
US7576569B2Aug 18, 2009
Circuit for dynamic circuit timing synthesis and monitoring of critical paths and environmental conditions of an integrated circuit
IBM34 citations90
US9465373B2Oct 11, 2016
Dynamic adjustment of operational parameters to compensate for sensor based measurements of circuit degradation
IBM6 citations84
US9310424B2Apr 12, 2016
Monitoring aging of silicon in an integrated circuit device
IBM9 citations84
US8713490B1Apr 29, 2014
Managing aging of silicon in an integrated circuit device
IBM12 citations84
US7321269B2Jan 22, 2008
High frequency ring oscillator with feed-forward paths
IBM19 citations84
US9407247B2Aug 2, 2016
Programmable delay circuit
IBM7 citations83
US9058130B2Jun 16, 2015
Tunable sector buffer for wide bandwidth resonant global clock distribution
IBM7 citations83
US9054682B2Jun 9, 2015
Wide bandwidth resonant global clock distribution
IBM7 citations83
US9000822B2Apr 7, 2015
Programmable delay circuit
IBM10 citations83
US7548823B2Jun 16, 2009
Correction of delay-based metric measurements using delay circuits having differing metric sensitivities
IBM17 citations83
US7542862B2Jun 2, 2009
Calibration of multi-metric sensitive delay measurement circuits
IBM11 citations83
US7734970B2Jun 8, 2010
Self-resetting, self-correcting latches
IBM6 citations73
US7590907B2Sep 15, 2009
Method and apparatus for soft-error immune and self-correcting latches
IBM5 citations73
US9276563B2Mar 1, 2016
Clock buffers with pulse drive capability for power efficiency
IBM5 citations71
US9117011B2Aug 25, 2015
Characterization and functional test in a processor or system utilizing critical path monitor to dynamically manage operational timing margin
IBM4 citations71
US7810000B2Oct 5, 2010
Circuit timing monitor having a selectable-path ring oscillator
IBM5 citations63
US7881135B2Feb 1, 2011
Method for QCRIT measurement in bulk CMOS using a switched capacitor circuit
IBM4 citations62
US7759980B2Jul 20, 2010
Circular edge detector for measuring timing of data signals
IBM3 citations62
US7415645B2Aug 19, 2008
Method and apparatus for soft-error immune and self-correcting latches
IBM3 citations57
US9767917B2Sep 19, 2017
Mitigation scheme for SRAM functionality
IBM1 citations52
US9459599B2Oct 4, 2016
Dynamic adjustment of operational parameters to compensate for sensor based measurements of circuit degradation
IBM0 citations52
US7880507B2Feb 1, 2011
Circular edge detector
IBM0 citations52
US10156882B2Dec 18, 2018
Multi-core dynamic frequency control system
IBM1 citations51
US10152107B2Dec 11, 2018
Multi-core dynamic frequency control system
IBM0 citations51
US9612612B2Apr 4, 2017
Tunable sector buffer for wide bandwidth resonant global clock distribution
IBM0 citations51
US9571100B2Feb 14, 2017
Clock buffers with pulse drive capability for power efficiency
IBM1 citations50
US9477568B2Oct 25, 2016
Managing interconnect electromigration effects
IBM0 citations42
US7667513B2Feb 23, 2010
Digital duty cycle corrector
IBM0 citations41