Inventor

YIN YUNPENG

US84 patents

⚠️ This page may combine multiple inventors who share the name “YIN YUNPENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YIN YUNPENG

IBM

Self-aligned contact process enabled by low temperature

finFET isolation by selective cyclic etch

Self-aligned vias formed using sacrificial metal caps

Double self aligned via patterning

DSA grapho-epitaxy process with etch stop material

Self-aligned contact process enabled by low temperature

Self-aligned contact process enabled by low temperature

Bulk fin formation with vertical fin sidewall profile

Work function metal fill for replacement gate fin field effect transistor process

Double self-aligned via patterning

Gate structure integration scheme for fin field effect transistors

Sidewall image transfer with a spin-on hardmask

Electrically isolated SiGe fin formation by local oxidation

Fin density control of multigate devices through sidewall image transfer processes

Trench patterning with block first sidewall image transfer

Non-merged epitaxially grown MOSFET devices

Finfet formed over dielectric

FinFET formed over dielectric

Horizontal metal-insulator-metal capacitor

Critical dimension shrink through selective metal growth on metal hardmask sidewalls

Critical dimension shrink through selective metal growth on metal hardmask sidewalls

Critical dimension shrink through selective metal growth on metal hardmask sidewalls

Patterning assist feature to mitigate reactive ion etch microloading effect

Lithographic material stack including a metal-compound hard mask

Method and structure of forming FinFET electrical fuse structure

Fin density control of multigate devices through sidewall image transfer processes

Stop layer through ion implantation for etch stop

Semiconductor device including source/drain formed on bulk and gate channel formed on oxide layer

Contact structure employing a self-aligned gate cap

Critical dimension shrink through selective metal growth on metal hardmask sidewalls

Fin formation in fin field effect transistors

Profile control in interconnect structures

Partially isolated Fin-shaped field effect transistors

Double self aligned via patterning

ARNOLD JOHN C

Dual hard mask lithography process

Sidewall image transfer process employing a cap material layer for a metal nitride layer

Mask and etch process for pattern assembly

Tone inversion with partial underlayer etch for semiconductor device formation

Method for forming small dimension openings in the organic masking layer of tri-layer lithography

Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation

Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation

ARNOLD JOHN CHRISTOPHER

Self aligning via patterning

Self aligning via patterning

GLOBALFOUNDRIES INC

Ultra-thin metal wires formed through selective deposition

Sidewall image transfer with a spin-on hardmask

YIN YUNPENG

Sidewall image transfer process

YANG CHIH-CHAO

Method of fabricating a profile control in interconnect structures

SODA EIICHI

Method of making a semiconductor device

TSENG CHIAHSUN

Self-aligned trench over fin

VIVO MOBILE COMMUNICATION CO LTD

Charging control circuit, charging circuit and charging control method