Inventor · disambiguated record
Satwik Patnaik
Also filed as: PATNAIK SATWIK
10 granted patents·1 pending application·14 citations·filing 2013–2024
83Inventor score
Top patents by PatentIndex Score
11 records- 0190US11121731B2Digital radio head controlINTEL CORP·Filed 2019·Granted Sep 14, 2021·5 cites·20 claims
- 0289US10931291B1System for multiple PLL synchronizationAMAZON TECH INC·Filed 2020·Granted Feb 23, 2021·4 cites·20 claims
- 0386US12191897B2Local oscillator (LO) generation for carrier aggregation in phased array front endsINTEL CORP·Filed 2024·Granted Jan 7, 2025·1 cites·12 claims
- 0479US11374557B2Radio design, control, and architectureINTEL CORP·Filed 2018·Granted Jun 28, 2022·3 cites·24 claims
- 0576US2025105864A1Adaptive spatial filtering and optimal combining of analog-to-digital converters (adcs) to maximize dynamic range in digital beamforming systemsINTEL CORP·Filed 2024·Application pending·0 cites
- 0670US11967980B2Injection-locked clock-multiplication for mixer local oscillator (LO) generationINTEL CORP·Filed 2021·Granted Apr 23, 2024·0 cites·22 claims
- 0770US10855224B2Magnetically decoupled concentric coils structure for area optimized high performance LC VCOsINTEL CORP·Filed 2019·Granted Dec 1, 2020·1 cites·21 claims
- 0857US12261930B1Local oscillator (LO) and reference clock signal distributionAMAZON TECH INC·Filed 2022·Granted Mar 25, 2025·0 cites·20 claims
- 0952US9467178B2Pseudo true time delay for multi-antenna systemsUNIV MINNESOTA·Filed 2014·Granted Oct 11, 2016·0 cites·33 claims
- 1051US9374111B2Multi-stage charge re-use analog circuitsUNIV MINNESOTA·Filed 2013·Granted Jun 21, 2016·0 cites·25 claims
- 1150US12431944B2Methods and devices for selecting a desired sub-harmonic of a high-frequency clockINTEL CORP·Filed 2019·Granted Sep 30, 2025·0 cites·18 claims
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