Inventor
TERTINEK STEFAN
AT35 patents
⚠️ This page may combine multiple inventors who share the name “TERTINEK STEFAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NXP BV
13 patentsUS11323294B2May 3, 2022
Ultra-wideband device power optimization
NXP BV8 citations85
US12313766B2May 27, 2025
Radar system, a radar arrangement, and a radar method for concurrent radar operations
NXP BV2 citations74
US11942984B2Mar 26, 2024
Communication device and operating method
NXP BV6 citations74
US11428772B2Aug 30, 2022
Compensating for crosstalk in determination of an angle of arrival of an electromagnetic wave at a receive antenna
NXP BV2 citations70
US12052051B2Jul 30, 2024
Ultra-wideband receiver module
NXP BV2 citations68
US12519229B2Jan 6, 2026
Communication device and corresponding operating method
NXP BV0 citations62
US12481052B2Nov 25, 2025
Localization with reduced power consumption
NXP BV0 citations62
US11915537B2Feb 27, 2024
Entry system and method of operating the same
NXP BV0 citations62
US11381329B2Jul 5, 2022
Detecting a moving object based on a phase of channel impulse responses
NXP BV1 citations61
US12047113B2Jul 23, 2024
Communication device and operating method
NXP BV0 citations60
US11774576B2Oct 3, 2023
Phase-based ranging
NXP BV0 citations52
US11714166B2Aug 1, 2023
Key fob localization inside vehicle
NXP BV0 citations51
US12546869B2Feb 10, 2026
Method and device for time-of-flight estimation in a communications system
NXP BV0 citations49
INTEL IP CORP
12 patentsUS9867155B1Jan 9, 2018
Amplitude-modulation signal and phase-modulation signal delay adjustment for polar transmitter
INTEL IP CORP11 citations84
US9548750B2Jan 17, 2017
Circuit, a time-to-digital converter, an integrated circuit, a transmitter, a receiver and a transceiver
INTEL IP CORP13 citations82
US9590647B2Mar 7, 2017
Noise-shaping circuit, digital-to-time converter, analog-to-digital converter, digital-to-analog converter frequency synthesizer, transmitter, receiver, transceiver, method for shaping noise in an input signal
INTEL IP CORP2 citations72
US9537585B2Jan 3, 2017
Circuit, an integrated circuit, a transmitter, a receiver, a transceiver, a method for obtaining calibration data and a method for generating a local oscillator signal
INTEL IP CORP3 citations72
US9755872B1Sep 5, 2017
Pulse generation using digital-to-time converter
INTEL IP CORP3 citations70
US11133809B2Sep 28, 2021
Method and circuit for determining phase continuity of a local oscillator signal, and local oscillator signal generation circuit
INTEL IP CORP0 citations62
US10623045B2Apr 14, 2020
Receiver and a method for reducing a distortion component within a baseband receive signal
INTEL IP CORP0 citations52
US9774363B1Sep 26, 2017
Gain calibration for digitally controlled oscillator in fast locking phase locked loops
INTEL IP CORP1 citations52
US9768809B2Sep 19, 2017
Digital-to-time converter spur reduction
INTEL IP CORP1 citations51
US9438259B2Sep 6, 2016
Circuit, an integrated circuit, a transmitter, a receiver, a transceiver, a method for generating a processed oscillator signal, an apparatus for generating a processed oscillator signal, and software-related implementations
INTEL IP CORP0 citations51
US9851696B2Dec 26, 2017
Circuit, a time-to-digital converter, an integrated circuit, a transmitter, a receiver and a transceiver
INTEL IP CORP1 citations50
US9935722B2Apr 3, 2018
Harmonic suppressing local oscillator signal generation
INTEL IP CORP1 citations49
INTEL CORP
5 patentsUS10511311B1Dec 17, 2019
Phase-continuous reference clock frequency shift for digital phase locked loop
INTEL CORP6 citations84
US9479187B2Oct 25, 2016
Predictive time-to-digital converter and method for providing a digital representation of a time interval
INTEL CORP3 citations73
US10892762B2Jan 12, 2021
Phase-continuous reference clock frequency shift for digital phase locked loop
INTEL CORP0 citations62
US9397689B2Jul 19, 2016
Interpolator systems and methods
INTEL CORP2 citations62
US9887784B1Feb 6, 2018
Compensation of a frequency disturbance in a digital phase lock loop
INTEL CORP1 citations52