Inventor
MAO HUI MIN
TW25 patents
⚠️ This page may combine multiple inventors who share the name “MAO HUI MIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NANYA TECHNOLOGY CORP
24 patentsUS7064044B2Jun 20, 2006
Contact etching utilizing multi-layer hard mask
NANYA TECHNOLOGY CORP12 citations84
US6987322B2Jan 17, 2006
Contact etching utilizing multi-layer hard mask
NANYA TECHNOLOGY CORP12 citations84
US6780739B1Aug 24, 2004
Bit line contact structure and method for forming the same
NANYA TECHNOLOGY CORP13 citations84
US6774007B2Aug 10, 2004
Method of fabricating shallow trench isolation
NANYA TECHNOLOGY CORP14 citations84
US6541347B2Apr 1, 2003
Method of providing planarity of a photoresist
NANYA TECHNOLOGY CORP13 citations83
US7419882B2Sep 2, 2008
Alignment mark and alignment method for the fabrication of trench-capacitor dram devices
NANYA TECHNOLOGY CORP13 citations82
US7678692B2Mar 16, 2010
Fabrication method for a damascene bit line contact plug
NANYA TECHNOLOGY CORP6 citations74
US7105453B2Sep 12, 2006
Method for forming contact holes
NANYA TECHNOLOGY CORP7 citations74
US6960525B2Nov 1, 2005
Method of forming metal plug
NANYA TECHNOLOGY CORP7 citations74
US6987053B2Jan 17, 2006
Method of evaluating reticle pattern overlay registration
NANYA TECHNOLOGY CORP8 citations73
US6833081B2Dec 21, 2004
Method of metal etching post cleaning
NANYA TECHNOLOGY CORP10 citations72
US6838866B2Jan 4, 2005
Process for measuring depth of source and drain
NANYA TECHNOLOGY CORP2 citations63
US6790765B1Sep 14, 2004
Method for forming contact
NANYA TECHNOLOGY CORP5 citations63
US6709975B2Mar 23, 2004
Method of forming inter-metal dielectric
NANYA TECHNOLOGY CORP4 citations63
US7211483B2May 1, 2007
Memory device with vertical transistors and deep trench capacitors and method of fabricating the same
NANYA TECHNOLOGY CORP4 citations62
US7009236B2Mar 7, 2006
Memory device with vertical transistors and deep trench capacitors and method of fabricating the same
NANYA TECHNOLOGY CORP4 citations62
US6977134B2Dec 20, 2005
Manufacturing method of a MOSFET gate
NANYA TECHNOLOGY CORP4 citations62
US6790735B2Sep 14, 2004
Method of forming source/drain regions in semiconductor devices
NANYA TECHNOLOGY CORP2 citations62
US7723181B2May 25, 2010
Overlay alignment mark and alignment method for the fabrication of trench-capacitor dram devices
NANYA TECHNOLOGY CORP6 citations61
US6909136B2Jun 21, 2005
Trench-capacitor DRAM cell having a folded gate conductor
NANYA TECHNOLOGY CORP3 citations60
US6706587B1Mar 16, 2004
Method for forming buried plates
NANYA TECHNOLOGY CORP4 citations58
US7285377B2Oct 23, 2007
Fabrication method for a damascene bit line contact plug
NANYA TECHNOLOGY CORP0 citations52
US7135783B2Nov 14, 2006
Contact etching utilizing partially recessed hard mask
NANYA TECHNOLOGY CORP0 citations51
US7195975B2Mar 27, 2007
Method of forming bit line contact via
NANYA TECHNOLOGY CORP0 citations42