Inventor

PANCHAGNULA VAMSI

US8 patents

⚠️ This page may combine multiple inventors who share the name “PANCHAGNULA VAMSI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CAVIUM LLC

4 patents

US10484311B2Nov 19, 2019

Method and apparatus for using multiple linked memory lists

CAVIUM LLC1 citations59

US10567273B2Feb 18, 2020

Method and apparatus for bypass routing of multicast data packets and avoiding replication to reduce overall switch latency

CAVIUM LLC1 citations58

US10447608B2Oct 15, 2019

Packet scheduling using hierarchical scheduling process with priority propagation

CAVIUM LLC0 citations40

US10291540B2May 14, 2019

Method and apparatus for performing a weighted queue scheduling using a set of fairness factors

CAVIUM LLC0 citations39

CAVIUM INC

2 patents

US9742694B2Aug 22, 2017

Method of dynamically renumbering ports and an apparatus thereof

CAVIUM INC10 citations82

US10560399B2Feb 11, 2020

Method of dynamically renumbering ports and an apparatus thereof

CAVIUM INC0 citations50

MARVELL ASIA PTE LTD

1 patent

US11082366B2Aug 3, 2021

Method and apparatus for using multiple linked memory lists

MARVELL ASIA PTE LTD0 citations59

Xplaint

1 patent

US10110515B2Oct 23, 2018

Packet scheduling using hierarchical scheduling process

Xplaint2 citations59