Inventor

TANG QIANG

CN195 patents

⚠️ This page may combine multiple inventors who share the name “TANG QIANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TANG QIANG

MICRON TECHNOLOGY INC

Pitch doubled circuit layout

Circuits for impedance adjustment having multiple termination devices with switchable resistances and methods of adjusting impedance

Data path with clock-data tracking

Internal clock distortion calibration using DC component offset of clock signal

Connecting memory cells to a data line sequentially while applying a program voltage to the memory cells

Apparatuses and methods for mixed charge pumps with voltage regulator circuits

Semiconductor devices including stair step structures, and related methods

I/O buffer offset mitigation

Apparatus for impedance adjustment and methods of their operation

Programming memories with stepped programming pulses

Semiconductor devices including stair step structures, and related methods

Threshold voltage distribution determination

Memory with temperature coefficient trimming

Memory timing self-calibration

Current mirror circuit having drain-source voltage clamp

Power on reset circuitry in electronic systems

Startup circuit and method

Startup circuit and method

NAND flash memory programming

Current sensing for Flash

Current mirror circuit having drain-source voltage clamp

I/O buffer offset mitigation while applying a same voltage level to two inputs of an input buffer

Electronic device with a reconfigurable charging mechanism

I/O buffer offset mitigation

YANGTZE MEMORY TECH CO LTD

Method for reading and writing memory cells in three-dimensional FeRAM

Method for reading and writing memory cells in three-dimensional FeRAM

Multi-die peak power management for three-dimensional memory

Staircase bridge structures for word line contacts in three-dimensional memory

Method for programming a memory system

Dynamic peak power management for multi-die operations

Peak power management for multi-die operations

Memory device capable of reducing program disturbance and erasing method thereof

Method of programming in flash memory devices

MARVELL INT LTD

Positive and negative voltage level shifter circuit

Adaptive opamp compensation

Asymmetric correction circuit with negative resistance

Program-and-erase method for multilevel nonvolatile memory

TANG QIANG

Sofa

Positive and negative voltage level shifter circuit

System and methods for multi-level nonvolatile memory read, program and erase

Machine-learning model, methods and systems for removal of unwanted people from photographs

ALIBABA GROUP HOLDING LTD

Blockchain consensus node selection

Method for view switching in a blockchain network

Blockchain-based consensus method and device

ADVANCED NEW TECHNOLOGIES CO LTD

Blockchain consensus node selection

Blockchain-based consensus method and device

BOE TECHNOLOGY GROUP CO LTD

Foldable support and display device

INTEL CORP

Apparatus, system, and method for multiple-segment floating gate

CHENGDU BOE OPTOELECT TECH CO

Flexible printed circuit and manufacturing method thereof, electronic device module and electronic device

ROUND ROCK RES LLC

Layout for high density conductive interconnects