Inventor · disambiguated record
Tuomas Heikkilä
Also filed as: HEIKKILA TUOMAS · HEIKKILÄ TUOMAS
8 granted patents·1 pending application·83 citations·filing 2014–2019
85Inventor score
Files withTACTOTEK OY9
Top patents by PatentIndex Score
9 records- 0196US10194526B1Electrical node, method for manufacturing an electrical node, electrical node strip or sheet, and multilayer structure comprising the nodeTACTOTEK OY·Filed 2018·Granted Jan 29, 2019·19 cites·18 claims
- 0295US10225932B1Interfacing arrangement, method for manufacturing an interfacing arrangement, and multilayer structure hosting an interfacing arrangementTACTOTEK OY·Filed 2018·Granted Mar 5, 2019·20 cites·20 claims
- 0394US10055530B1Arrangement and method for facilitating electronics design in connection with 3D structuresTACTOTEK OY·Filed 2017·Granted Aug 21, 2018·14 cites·9 claims
- 0494US9990455B1Arrangement and method for facilitating electronics design in connection with 3D structuresTACTOTEK OY·Filed 2017·Granted Jun 5, 2018·14 cites·27 claims
- 0591US9869810B2Method for manufacturing electronic products, related arrangement and productTACTOTEK OY·Filed 2014·Granted Jan 16, 2018·16 cites·23 claims
- 0661US10285261B1Electrical node, method for manufacturing an electrical node, electrical node strip or sheet, and multilayer structure comprising the nodeTACTOTEK OY·Filed 2018·Granted May 7, 2019·0 cites·27 claims
- 0759US10897196B2Arrangement and method for delivering a current-controlled voltageTACTOTEK OY·Filed 2019·Granted Jan 19, 2021·0 cites·6 claims
- 0854US10491115B2Arrangement and method for delivering a current-controlled voltageTACTOTEK OY·Filed 2017·Granted Nov 26, 2019·0 cites·10 claims
- 0953US2017371092A1Method for manufacturing electronic products, related arrangement and productTACTOTEK OY·Filed 2017·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →