Inventor · disambiguated record
Ian Harvey Arellano
Also filed as: ARELLANO IAN HARVEY · ARELLANO IAN HARVEY JURALBAL
8 granted patents·1 pending application·5 citations·filing 2017–2024
77Inventor score
Files withST MICROELECTRONICS INC9
Top patents by PatentIndex Score
9 records- 0182US10128169B1Package with backside protective layer during molding to prevent mold flashing failureST MICROELECTRONICS INC·Filed 2017·Granted Nov 13, 2018·3 cites·16 claims
- 0279US12255076B2Method for manufacturing leadless semiconductor package with wettable flanksST MICROELECTRONICS INC·Filed 2024·Granted Mar 18, 2025·0 cites·20 claims
- 0378US11069601B2Leadless semiconductor package with wettable flanksST MICROELECTRONICS INC·Filed 2019·Granted Jul 20, 2021·2 cites·15 claims
- 0477US12224251B2Semiconductor device having cavities at an interface of an encapsulant and a die pad or leadsST MICROELECTRONICS INC·Filed 2023·Granted Feb 11, 2025·0 cites·19 claims
- 0573US11862579B2Semiconductor device having cavities at an interface of an encapsulant and a die pad or leadsST MICROELECTRONICS INC·Filed 2022·Granted Jan 2, 2024·0 cites·20 claims
- 0669US11929259B2Method for manufacturing leadless semiconductor package with wettable flanksST MICROELECTRONICS INC·Filed 2021·Granted Mar 12, 2024·0 cites·20 claims
- 0766US11393774B2Semiconductor device having cavities at an interface of an encapsulant and a die pad or leadsST MICROELECTRONICS INC·Filed 2020·Granted Jul 19, 2022·0 cites·20 claims
- 0852US10461019B2Package with backside protective layer during molding to prevent mold flashing failureST MICROELECTRONICS INC·Filed 2018·Granted Oct 29, 2019·0 cites·19 claims
- 0950US2023036201A1Leadless semiconductor package with de-metallized porous structures and method for manufacturing the sameST MICROELECTRONICS INC·Filed 2022·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →