Inventor
LUO JIONG
US9 patents
⚠️ This page may combine multiple inventors who share the name “LUO JIONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SYNOPSYS INC
8 patentsUS10740517B1Aug 11, 2020
Integrated circuit (IC) optimization using Boolean resynthesis
SYNOPSYS INC14 citations82
US10839117B1Nov 17, 2020
Robust exclusive sum-of-product (ESOP) refactoring
SYNOPSYS INC2 citations66
US11669665B1Jun 6, 2023
Application-specific integrated circuit (ASIC) synthesis based on lookup table (LUT) mapping and optimization
SYNOPSYS INC4 citations64
US11010511B2May 18, 2021
Scalable boolean methods in a modern synthesis flow
SYNOPSYS INC1 citations57
US12175176B2Dec 24, 2024
Fast synthesis of logical circuit design with predictive timing
SYNOPSYS INC0 citations51
US11120184B2Sep 14, 2021
Satisfiability sweeping for synthesis
SYNOPSYS INC0 citations48
US10325051B2Jun 18, 2019
Exact delay synthesis
SYNOPSYS INC0 citations38
US10049174B2Aug 14, 2018
Exact delay synthesis
SYNOPSYS INC0 citations38