Inventor
BUSSA VINOD
IN13 patents
Patents
13 patentsUS9594680B1Mar 14, 2017
Identifying stale entries in address translation cache
IBM16 citations92
US7647539B2Jan 12, 2010
System and method of testing using test pattern re-execution in varying timing scenarios for processor design verification and validation
IBM29 citations91
US7669083B2Feb 23, 2010
System and method for re-shuffling test case instruction orders for processor design verification and validation
IBM22 citations89
US9697138B2Jul 4, 2017
Identifying stale entries in address translation cache
IBM1 citations62
US7966521B2Jun 21, 2011
Light weight and high throughput test case generation methodology for testing cache/TLB intervention and diagnostics
IBM5 citations62
US11604757B2Mar 14, 2023
Processing data in memory using an FPGA
IBM0 citations53
US10261917B2Apr 16, 2019
Identifying stale entries in address translation cache
IBM0 citations52
US10169181B2Jan 1, 2019
Efficient validation of transactional memory in a computer processor
IBM0 citations52
US9892060B2Feb 13, 2018
Identifying stale entries in address translation cache
IBM0 citations52
US9720845B2Aug 1, 2017
Identifying stale entries in address translation cache
IBM0 citations52
US8019566B2Sep 13, 2011
System and method for efficiently testing cache congruence classes during processor design verification and validation
IBM1 citations51
US11513983B2Nov 29, 2022
Interrupt migration
IBM0 citations50
US11188369B2Nov 30, 2021
Interrupt virtualization
IBM0 citations44