Inventor
YUAN XIAO-JIE
US4 patents
Patents
4 patentsUS7032194B1Apr 18, 2006
Layout correction algorithms for removing stress and other physical effect induced process deviation
XILINX INC87 citations96
US7109734B2Sep 19, 2006
Characterizing circuit performance by separating device and interconnect impact on signal delay
XILINX INC18 citations91
US7724016B2May 25, 2010
Characterizing circuit performance by separating device and interconnect impact on signal delay
XILINX INC6 citations72
US7489152B2Feb 10, 2009
Characterizing circuit performance by separating device and interconnect impact on signal delay
XILINX INC7 citations72