Inventor
TAMIR ELIEZER
IL66 patents
⚠️ This page may combine multiple inventors who share the name “TAMIR ELIEZER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
38 patentsUS9467512B2Oct 11, 2016
Techniques for remote client access to a storage medium coupled with a server
INTEL CORP15 citations92
US9467511B2Oct 11, 2016
Techniques for use of vendor defined messages to execute a command to access a storage device
INTEL CORP20 citations92
US10552207B2Feb 4, 2020
Systems and methods for multi-architecture computing including program stack translation
INTEL CORP11 citations86
US10713213B2Jul 14, 2020
Systems and methods for multi-architecture computing
INTEL CORP10 citations84
US10684984B2Jun 16, 2020
Computing devices and server systems with processing cores having different instruction set architectures
INTEL CORP10 citations84
US9986028B2May 29, 2018
Techniques to replicate data between storage servers
INTEL CORP16 citations84
US9311110B2Apr 12, 2016
Techniques to initialize from a remotely accessible storage device
INTEL CORP12 citations83
US10966135B2Mar 30, 2021
Software-defined networking data re-direction
INTEL CORP7 citations82
US10754707B2Aug 25, 2020
Extending berkeley packet filter semantics for hardware offloads
INTEL CORP9 citations82
US10341230B2Jul 2, 2019
Techniques for forwarding or receiving data segments associated with a large data packet
INTEL CORP2 citations73
US10127177B2Nov 13, 2018
Unified device interface for a multi-bus system
INTEL CORP5 citations73
US9973335B2May 15, 2018
Shared buffers for processing elements on a network device
INTEL CORP2 citations73
US9686190B2Jun 20, 2017
Techniques for forwarding or receiving data segments associated with a large data packet
INTEL CORP3 citations73
US9661007B2May 23, 2017
Network interface devices with remote storage control
INTEL CORP5 citations73
US9563431B2Feb 7, 2017
Techniques for cooperative execution between asymmetric processor cores
INTEL CORP4 citations73
US11843550B2Dec 12, 2023
Packet processing with reduced latency
INTEL CORP1 citations72
US11178076B2Nov 16, 2021
Packet processing with reduced latency
INTEL CORP1 citations72
US10476818B2Nov 12, 2019
Packet processing with reduced latency
INTEL CORP1 citations72
US10305813B2May 28, 2019
Socket management with reduced latency packet processing
INTEL CORP2 citations72
US9558132B2Jan 31, 2017
Socket management with reduced latency packet processing
INTEL CORP3 citations72
US11641608B2May 2, 2023
Software-defined networking data re-direction
INTEL CORP2 citations71
US11531752B2Dec 20, 2022
Technologies for control plane separation in a network interface controller
INTEL CORP3 citations68
US10275558B2Apr 30, 2019
Technologies for providing FPGA infrastructure-as-a-service computing capabilities
INTEL CORP4 citations65
US9030936B2May 12, 2015
Flow control with reduced buffer usage for network devices
INTEL CORP2 citations63
US12124403B2Oct 22, 2024
Systems and methods for multi-architecture computing
INTEL CORP0 citations62
US11875839B2Jan 16, 2024
Flow based rate limit
INTEL CORP0 citations62
US11494220B2Nov 8, 2022
Scalable techniques for data transfer between virtual machines
INTEL CORP0 citations62
US11275709B2Mar 15, 2022
Systems and methods for multi-architecture computing
INTEL CORP0 citations62
US11134125B2Sep 28, 2021
Active link during LAN interface reset
INTEL CORP0 citations62
US8996755B2Mar 31, 2015
Facilitating, at least in part, by circuitry, accessing of at least one controller command interface
INTEL CORP1 citations62
US12067427B2Aug 20, 2024
Extending Berkeley packet filter semantics for hardware offloads
INTEL CORP0 citations61
US11474879B2Oct 18, 2022
Extending Berkeley Packet Filter semantics for hardware offloads
INTEL CORP0 citations61
US11474878B2Oct 18, 2022
Extending berkeley packet filter semantics for hardware offloads
INTEL CORP0 citations61
US11138143B2Oct 5, 2021
Techniques for command validation for access to a storage device by a remote client
INTEL CORP0 citations61
US10657056B2May 19, 2020
Technologies for demoting cache lines to shared cache
INTEL CORP1 citations61
US11847008B2Dec 19, 2023
Technologies for providing efficient detection of idle poll loops
INTEL CORP0 citations59
US10782978B2Sep 22, 2020
Techniques for cooperative execution between asymmetric processor cores
INTEL CORP0 citations52
US10628192B2Apr 21, 2020
Scalable techniques for data transfer between virtual machines
INTEL CORP0 citations52
BROADCOM CORP
3 patentsUS7925795B2Apr 12, 2011
Method and system for configuring a plurality of network interfaces that share a physical interface
BROADCOM CORP68 citations98
US7693138B2Apr 6, 2010
Method and system for transparent TCP offload with best effort direct placement of incoming traffic
BROADCOM CORP6 citations72
US7684344B2Mar 23, 2010
Method and system for transparent TCP offload
BROADCOM CORP6 citations72
ALONI ELIEZER
2 patentsTAMIR ELIEZER
2 patentsTAHOE RES LTD
2 patentsMCAFEE INC
1 patentTRIANTAFILLOU NICHOLAS D
1 patentFRIEDMAN BEN-ZION
1 patentShowing the top 50 of 66 patents by PatentIndex Score.