P

Inventor

JUNGROTH OWEN W

US21 patents
⚠️ This page may combine multiple inventors who share the name “JUNGROTH OWEN W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

17 patents
US5621690AApr 15, 1997

Nonvolatile memory blocking architecture and redundancy

INTEL CORP187 citations97
US5386388AJan 31, 1995

Single cell reference scheme for flash memory sensing and program state verification

INTEL CORP147 citations97
US6418506B1Jul 9, 2002

Integrated circuit memory and method for transferring data using a volatile memory to buffer data for a nonvolatile memory array

INTEL CORP148 citations96
US6297974B1Oct 2, 2001

Method and apparatus for reducing stress across capacitors used in integrated circuits

INTEL CORP70 citations95
US4975883ADec 4, 1990

Method and apparatus for preventing the erasure and programming of a nonvolatile memory

INTEL CORP96 citations95
US5414829AMay 9, 1995

Override timing control circuitry and method for terminating program and erase sequences in a flash memory

INTEL CORP43 citations92
US5390146AFeb 14, 1995

Reference switching circuit for flash EPROM

INTEL CORP27 citations92
US5265059ANov 23, 1993

Circuitry and method for discharging a drain of a cell of a non-volatile semiconductor memory

INTEL CORP44 citations92
US5249158ASep 28, 1993

Flash memory blocking architecture

INTEL CORP60 citations92
US4875188AOct 17, 1989

Voltage margining circuit for flash eprom

INTEL CORP56 citations92
US6515906B2Feb 4, 2003

Method and apparatus for matched-reference sensing architecture for non-volatile memories

INTEL CORP13 citations84
US6831862B2Dec 14, 2004

Method and apparatus for matched-reference sensing architecture for non-volatile memories

INTEL CORP10 citations74
US10923450B2Feb 16, 2021

Memory arrays with bonded and shared logic circuitry

INTEL CORP4 citations73
US6449211B1Sep 10, 2002

Voltage driver for a memory

INTEL CORP9 citations71
USRE41217EApr 13, 2010

Method and apparatus for reducing stress across capacitors used in integrated circuits

INTEL CORP4 citations62
US11587874B2Feb 21, 2023

Resistance reduction for word lines in memory arrays

INTEL CORP0 citations52
US10515973B2Dec 24, 2019

Wordline bridge in a 3D memory array

INTEL CORP0 citations40

MICRON TECHNOLOGY INC

3 patents

INTLE CORP

1 patent