P

Inventor

RAMRAKHYANI PRAKASH S

US17 patents

Patents

17 patents
US10540297B2Jan 21, 2020

Memory organization for security and reliability

ADVANCED RISC MACH LTD9 citations81
US10942856B2Mar 9, 2021

System, method and apparatus for secure functions and cache line data

ADVANCED RISC MACH LTD3 citations72
US10929308B2Feb 23, 2021

Performing maintenance operations

ADVANCED RISC MACH LTD5 citations72
US10831678B2Nov 10, 2020

Multi-tier cache placement mechanism

ADVANCED RISC MACH LTD5 citations71
US10733313B2Aug 4, 2020

Counter integrity tree for memory security

ADVANCED RISC MACH LTD2 citations71
US10997083B2May 4, 2021

Parallel page table entry access when performing address translations

ADVANCED RISC MACH LTD2 citations69
US11030101B2Jun 8, 2021

Cache storage for multiple requesters and usage estimation thereof

ADVANCED RISC MACH LTD1 citations62
US12517733B2Jan 6, 2026

Circuits and methods for picking multiple ready instructions per cycle

ADVANCED RISC MACH LTD0 citations51
US12010242B2Jun 11, 2024

Memory protection using cached partial hash values

ADVANCED RISC MACH LTD0 citations51
US11658808B2May 23, 2023

Re-encryption following an OTP update event

ADVANCED RISC MACH LTD0 citations51
US11042480B2Jun 22, 2021

System, method and apparatus for secure functions and cache line data

ADVANCED RISC MACH LTD0 citations51
US10831673B2Nov 10, 2020

Memory address translation

ADVANCED RISC MACH LTD0 citations51
US10423510B2Sep 24, 2019

Apparatus and method for predicting a redundancy period

ADVANCED RISC MACH LTD0 citations51
US11513962B2Nov 29, 2022

Draining operation to cause store data to be written to persistent memory

ADVANCED RISC MACH LTD0 citations49
US10866904B2Dec 15, 2020

Data storage for multiple data types

ADVANCED RISC MACH LTD0 citations40
US10853262B2Dec 1, 2020

Memory address translation using stored key entries

ADVANCED RISC MACH LTD0 citations40
US10866899B2Dec 15, 2020

Method and apparatus for control of a tiered memory system

ADVANCED RISC MACH LTD0 citations39