Inventor
HO PAUL KWOK KEUNG
SG21 patents
⚠️ This page may combine multiple inventors who share the name “HO PAUL KWOK KEUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CHARTERED SEMICONDUCTOR MFG
18 patentsUS6683002B1Jan 27, 2004
Method to create a copper diffusion deterrent interface
CHARTERED SEMICONDUCTOR MFG71 citations98
US6274499B1Aug 14, 2001
Method to avoid copper contamination during copper etching and CMP
CHARTERED SEMICONDUCTOR MFG98 citations98
US6184138B1Feb 6, 2001
Method to create a controllable and reproducible dual copper damascene structure
CHARTERED SEMICONDUCTOR MFG121 citations98
US6251786B1Jun 26, 2001
Method to create a copper dual damascene structure with less dishing and erosion
CHARTERED SEMICONDUCTOR MFG65 citations96
US6225221B1May 1, 2001
Method to deposit a copper seed layer for dual damascene interconnects
CHARTERED SEMICONDUCTOR MFG53 citations95
US6720204B2Apr 13, 2004
Method of using hydrogen plasma to pre-clean copper surfaces during Cu/Cu or Cu/metal bonding
CHARTERED SEMICONDUCTOR MFG38 citations92
US6475810B1Nov 5, 2002
Method of manufacturing embedded organic stop layer for dual damascene patterning
CHARTERED SEMICONDUCTOR MFG24 citations92
US6429117B1Aug 6, 2002
Method to create copper traps by modifying treatment on the dielectrics surface
CHARTERED SEMICONDUCTOR MFG21 citations92
US6017826AJan 25, 2000
Chlorine containing plasma etch method with enhanced sidewall passivation and attenuated microloading effect
CHARTERED SEMICONDUCTOR MFG38 citations92
US6540841B1Apr 1, 2003
Method and apparatus for removing contaminants from the perimeter of a semiconductor substrate
CHARTERED SEMICONDUCTOR MFG13 citations84
US6261955B1Jul 17, 2001
Application of vapor phase HFACAC-based compound for use in copper decontamination and cleaning processes
CHARTERED SEMICONDUCTOR MFG6 citations74
US6261954B1Jul 17, 2001
Method to deposit a copper layer
CHARTERED SEMICONDUCTOR MFG12 citations74
US6987321B2Jan 17, 2006
Copper diffusion deterrent interface
CHARTERED SEMICONDUCTOR MFG7 citations72
US6813796B2Nov 9, 2004
Apparatus and methods to clean copper contamination on wafer edge
CHARTERED SEMICONDUCTOR MFG4 citations63
US6692579B2Feb 17, 2004
Method for cleaning semiconductor structures using hydrocarbon and solvents in a repetitive vapor phase/liquid phase sequence
CHARTERED SEMICONDUCTOR MFG5 citations63
US6368958B2Apr 9, 2002
Method to deposit a cooper seed layer for dual damascence interconnects
CHARTERED SEMICONDUCTOR MFG4 citations63
US6358821B1Mar 19, 2002
Method of copper transport prevention by a sputtered gettering layer on backside of wafer
CHARTERED SEMICONDUCTOR MFG5 citations63
US6548413B1Apr 15, 2003
Method to reduce microloading in metal etching
CHARTERED SEMICONDUCTOR MFG4 citations52
NANO & ADVANCED MATERIALS INST LTD
3 patentsUS10290432B1May 14, 2019
Method for forming perovskite solar cell with printable carbon electrode
NANO & ADVANCED MATERIALS INST LTD22 citations91
US9583711B2Feb 28, 2017
Conductive and photosensitive polymers
NANO & ADVANCED MATERIALS INST LTD0 citations45
US9243340B2Jan 26, 2016
Non-vacuum method of manufacturing light-absorbing materials for solar cell application
NANO & ADVANCED MATERIALS INST LTD0 citations30