Inventor

KIRSCHT JOSEPH ALLEN

US22 patents

⚠️ This page may combine multiple inventors who share the name “KIRSCHT JOSEPH ALLEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KIRSCHT JOSEPH ALLEN

IBM

Implementing minimized latency and maximized reliability when data traverses multiple buses

System and method for managing mirrored memory transactions and error recovery

Scheduling of background scrub commands to reduce high workload memory request latency

Memory controller and method for optimized read/modify/write performance

Memory controller and method for optimized read/modify/write performance

Efficient scheduling of background scrub commands

Reducing power-on time by simulating operating system memory hot add

Memory controller and method for copying mirrored memory that allows processor accesses to memory during a mirror copy operation

Memory controller and method for scrubbing memory without using explicit atomic operations

Memory controller and method for optimized read/modify/write performance

Managing mirrored memory transactions and error recovery

Method for implementing processor bus speculative data completion

Memory controller and method for scrubbing memory without using explicit atomic operations

Dynamic optimization of latency and bandwidth on DRAM interfaces

Implementing dynamic physical memory reallocation

Method and apparatus for accessing memory in a computer system architecture supporting heterogeneous configurations of memory structures

Memory controller granular read queue dynamic optimization of command selection

BLACKMON HERMAN LEE

Spacing periodic commands to a volatile memory for increased performance and decreased collision

Selecting a command to send to memory

DASARI SHIVA R

Memory initialization time reduction

BARRETT WAYNE MELVIN

Apparatus for implementing processor bus speculative data completion

KIRSCHT JOSEPH ALLEN

Simulating memory hot add