Inventor

SCOTT DAVID B

US64 patents

⚠️ This page may combine multiple inventors who share the name “SCOTT DAVID B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SCOTT DAVID B

TEXAS INSTRUMENTS INC

System and method for IDDQ measurement in system on a chip (SOC) design

Method of forming a polysilicon resistor using an oxide, nitride stack

Method of manufacturing silicide contacts for CMOS devices

Adaptive voltage control and body bias for performance and energy optimization

Combination DRAM and SRAM memory array

Circuit to improve electrostatic discharge protection

High performance bipolar differential sense amplifier in a BiCMOS SRAM

Ultra low area overhead retention flip-flop for power-down applications

Reduced standby power memory array and method

NMOS source/drain doping with both P and As

NMOS source/drain doping with both P and As

Integrated header switch with low-leakage PMOS and high-leakage NMOS transistors

Semiconductor memory device having Y-select gate voltage that varies according to memory cell access operation

Dynamic random access memory having reduced array voltage

Phase detector and method

Split-level CMOS

Silicide contacts for CMOS devices

CMOS Source/drain implant process without compensation of polysilicon doping

Retention register with normal functionality independent of retention power supply

Method for fabricating high density DRAM reticles

Method of forming bipolar transistor with integral base emitter load resistor

High voltage bipolar transistor in BiCMOS

Integrated circuit having an internal reference circuit to supply internal logic circuits with a reduced voltage

High voltage lateral transistor

Forming a split-level CMOS device

Memory cell with transistors having relatively high threshold voltages in response to selective gate doping

Bipolar layout for improved performance

Transistor circuit with varying resistance lightly doped diffused regions for electrostatic discharge (“ESD”) protection

Transistor circuit with varying resistance lightly doped diffused regions for electrostatic discharge (ESD) protection

Method of forming a metal oxide semiconductor transistor with self-aligned channel implant

Semiconductor device having offset twisted bit lines

Power-down reference circuit for ECL gate circuitry

L & P PROPERTY MANAGEMENT CO

Customized mattress evaluation system

Air bed control

Program controlled quilter and panel cutter system with automatic shrinkage compensation

Quilting method and apparatus

Quilting method and apparatus

KINGSDOWN INC

Apparatuses and methods providing variable support and variable comfort control of a sleep system and automatic adjustment thereof

Apparatuses and methods for automatic pillow adjustment

Apparatuses and methods providing variable support and variable comfort control of a sleep system and automatic adjustment thereof

Apparatuses and methods providing variable support and variable comfort control of a sleep system and automatic adjustment thereof

Apparatuses and methods for measured sleep alarm signaling

OEXMAN ROBERT D

Systems and methods for controlling a bedroom environment and for providing sleep data

Apparatuses and methods for evaluating a person for a sleep system

Methods and apparatuses for testing a sleep support member

STANLEY WORKS

Vibration damped hammer

SHIRLEY INST

Knife

TAIWAN SEMICONDUCTOR MFG

Integrated circuits and manufacturing methods thereof

DAVIES RODERICK D

Mask-saving technique for forming CMOS source/drain regions

STANLEY TOOLS LTD

Abrading tool blades and method of making same