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Inventor

HARLEY ERIC C T

US10 patents
⚠️ This page may combine multiple inventors who share the name “HARLEY ERIC C T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GLOBALFOUNDRIES INC

4 patents
US9287264B1Mar 15, 2016

Epitaxially grown silicon germanium channel FinFET with silicon underlayer

GLOBALFOUNDRIES INC15 citations83
US9577099B2Feb 21, 2017

Diamond shaped source drain epitaxy with underlying buffer layer

GLOBALFOUNDRIES INC2 citations73
US9536985B2Jan 3, 2017

Epitaxial growth of material on source/drain regions of FinFET structure

GLOBALFOUNDRIES INC2 citations72
US9466616B2Oct 11, 2016

Uniform junction formation in FinFETs

GLOBALFOUNDRIES INC1 citations52

IBM

3 patents
US8361859B2Jan 29, 2013

Stressed transistor with improved metastability

IBM13 citations84
US9318608B1Apr 19, 2016

Uniform junction formation in FinFETs

IBM3 citations73
US7687804B2Mar 30, 2010

Method for fabricating a semiconductor structures and structures thereof

IBM1 citations52

HARLEY ERIC C T

1 patent
US8232186B2Jul 31, 2012

Methods of integrating reverse eSiGe on NFET and SiGe channel on PFET, and related structure

HARLEY ERIC C T13 citations78

ADAM THOMAS N

1 patent
US8080451B2Dec 20, 2011

Fabricating semiconductor structures

ADAM THOMAS N1 citations51

HOLT JUDSON ROBERT

1 patent
US8084788B2Dec 27, 2011

Method of forming source and drain of a field-effect-transistor and structure thereof

HOLT JUDSON ROBERT0 citations27