Inventor
MOON IN-HO
KR26 patents
⚠️ This page may combine multiple inventors who share the name “MOON IN-HO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
AMERICAN STANDARD INC
14 patentsUSD403546SJan 5, 1999
Shelf
AMERICAN STANDARD INC37 citations96
USD374585SOct 15, 1996
Toilet paper roll support
AMERICAN STANDARD INC21 citations92
USD373699SSep 17, 1996
Shelf
AMERICAN STANDARD INC33 citations92
USD371430SJul 2, 1996
Faucet handle
AMERICAN STANDARD INC29 citations92
USD364527SNov 28, 1995
Corner shelf
AMERICAN STANDARD INC15 citations82
USD362489SSep 19, 1995
Mixer tap handle
AMERICAN STANDARD INC19 citations82
USD379570SJun 3, 1997
Shelf
AMERICAN STANDARD INC8 citations74
USD364768SDec 5, 1995
Towel rack
AMERICAN STANDARD INC6 citations74
USD362362SSep 19, 1995
Towel rod
AMERICAN STANDARD INC14 citations74
USD409034SMay 4, 1999
Shelf
AMERICAN STANDARD INC2 citations63
USD378310SMar 4, 1997
Faucet
AMERICAN STANDARD INC3 citations63
USD374145SOct 1, 1996
Hanger
AMERICAN STANDARD INC2 citations63
USD372763SAug 13, 1996
Faucet body
AMERICAN STANDARD INC3 citations63
USD366518SJan 23, 1996
Faucet handle
AMERICAN STANDARD INC4 citations63
SYNOPSYS INC
7 patentsUS7890896B2Feb 15, 2011
Method and apparatus for distinguishing combinational designs
SYNOPSYS INC19 citations92
US8015521B2Sep 6, 2011
Method and system for performing sequential equivalence checking on integrated circuit (IC) designs
SYNOPSYS INC8 citations84
US10762262B1Sep 1, 2020
Multi-dimensional constraint solver using modified relaxation process
SYNOPSYS INC5 citations71
US8032848B2Oct 4, 2011
Performing abstraction-refinement using a lower-bound-distance to verify the functionality of a circuit design
SYNOPSYS INC3 citations63
US11341416B1May 24, 2022
Bit-level learning for word-level constraint solving
SYNOPSYS INC0 citations61
US11615225B2Mar 28, 2023
Logic simulation of circuit designs using on-the-fly bit reduction for constraint solving
SYNOPSYS INC0 citations52
US12475285B1Nov 18, 2025
Solving multiple array problems interacting with each other in constraint solving for functional verification of logic designs
SYNOPSYS INC0 citations50
MOON IN-HO
4 patentsUS8156462B2Apr 10, 2012
Verification technique including deriving invariants from constraints
MOON IN-HO9 citations83
US8074194B2Dec 6, 2011
Method and apparatus for distinguishing combinational designs
MOON IN-HO8 citations83
USD362775SOct 3, 1995
Towel ring
MOON IN-HO8 citations73
US8302044B2Oct 30, 2012
Abstraction-based livelock/deadlock checking for hardware verification
MOON IN-HO5 citations53