Inventor

LEE ANDY L

US146 patents

⚠️ This page may combine multiple inventors who share the name “LEE ANDY L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE ANDY L

ALTERA CORP

Error detection on programmable logic resources

Programmable logic device architecture with super-regions having logic regions and a memory region

Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits

Soft error location and sensitivity detection for programmable devices

Memory interface phase-shift circuitry to support multiple frequency ranges

Configuration shift register

Method and apparatus for supporting variable speed configuration hardware

Reconfigurable programmable logic system with configuration recovery mode

Circuitry and methods for internal interconnection of programmable logic devices

Memory elements with increased write margin and soft error upset immunity

Soft core control of dedicated memory interface hardware in a programmable logic device

Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits

PLD architecture for flexible placement of IP function blocks

Programmable logic device with hierarchical interconnection resources

Programmable logic device with redundant circuitry

Programmable logic device with redundant circuitry

Redundancy circuitry for logic circuits

Programmable logic device with hierarchical interconnection resources

Configurable memory structures in a programmable logic device

Programmable logic device having logic elements with dedicated hardware to configure look up tables as registers

Programmable logic devices with two-phase latch circuitry

High-performance memory interface circuit architecture

Multiple data rate memory interface architecture

Shift register implementations of first-in/first-out memories utilizing a double increment gray code counter

Programmable logic device logic modules with shift register capabilities

Programmable logic devices with enhanced multiplexing capabilities

Redundancy circuitry for logic circuits

Programmable logic devices with enhanced multiplexing capabilities

Redundancy circuitry for logic circuits

Error detection on programmable logic resources

Testing circuitry for programmable logic devices with selectable power supply voltages

Structures for LUT-based arithmetic in PLDs

Apparatus and methods for power management in integrated circuits

Versatile logic element and logic array block

Bypass-able carry chain in a programmable logic device

Initializing a carry chain in a programmable logic device

Versatile logic element and logic array block

Passgate structures for use in low-voltage applications

Routing architecture for a programmable logic device

Programmable logic device with hierarchical interconnection resources

Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits

Programmable logic device with hierarchical interconnection resources

Input/output circuitry for programmable logic devices

Omnibus logic element

Programmable integrated circuits with in-operation reconfiguration capability

RAHIM IRFAN

Apparatus for configuring performance of field programmable gate arrays and associated methods

Volatile memory elements with soft error upset immunity

Computer-aided design tools and memory element power supply circuitry for selectively overdriving circuit blocks

LEE ANDY L

Hardened programmable devices

LIU JUN

Memory circuit with PMOS access transistors