Inventor

KO UMING

US44 patents

⚠️ This page may combine multiple inventors who share the name “KO UMING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KO UMING

TEXAS INSTRUMENTS INC

Hybrid dual threshold transistor registers

System and method for IDDQ measurement in system on a chip (SOC) design

Data processing with progressive, adaptive, CPU-driven power management

Apparatus, system and method for control of speed of operation and power consumption of a memory

Hybrid dual threshold transistor multiplexer

CPU, memory controller, bus bridge integrated circuits, layout structures, system and methods

Family of logic circuits emploting mosfets of differing thershold voltages

Multiplexer circuits

High resolution digital phase locked loop with automatic recovery logic

Ultra low area overhead retention flip-flop for power-down applications

Integrated circuits for low power dissipation in signaling between different-voltage on chip regions

Microprocessor burst mode data transfer ordering circuitry and method

Low-power design techniques for high-performance CMOS circuits

Noise insensitive high performance energy efficient push pull isolation flip-flop circuits

High performance energy efficient push pull D flip flop circuits

System and method for auto-power gating synthesis for active leakage reduction

Split-slave dual-path D flip flop

Integrated circuit with dynamically controlled voltage supply

Integrated circuit dynamic parameter management in response to dynamic energy evaluation

Short circuit power optimization for CMOS circuits

Memory power management systems and methods

Performance and area scalable cell architecture technology

Retention register with normal functionality independent of retention power supply

Switch structure for reduced voltage fluctuation in power domains and sub-domains

Low power approach to state sequencing and sequential memory addressing in electronic systems

Data processing with energy-efficient, multi-divided module memory architectures

Data processing with a self-timed approach to spurious transitions

System and method for auto-power gating synthesis for active leakage reduction

Data processing with self-timed feature and low power transition detection

Low power, high performance latching interfaces for converting dynamic inputs into static outputs

Potential and rate adjust header switch circuitry reducing transient current

Retention register for system-transparent state retention

Hybrid data and clock recharging techniques in domino logic circuits minimizes charge sharing during evaluation

Dual mode SRAM architecture for voltage scaling and power management

Apparatus, system and method of power state control

MEDIATEK SINGAPORE PTE LTD

Chip package

Fast and Autonomous mechanism for CPU OC protection

Performance, thermal and power management system associated with an integrated circuit and related method

Performance, thermal and power management system associated with an integrated circuit and related method

Control method of clock gating for dithering in the clock signal to mitigate voltage transients

Performance, thermal and power management system associated with an integrated circuit and related method

Performance, thermal and power management system associated with an integrated circuit and related method

MEDIATEK INC

Dual-rail power equalizer

Portable device and calibration method thereof