Inventor

FUJII TARO

JP30 patents

⚠️ This page may combine multiple inventors who share the name “FUJII TARO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FUJII TARO

NEC CORP

Array type processor with state transition controller identifying switch configuration and processing element instruction address

Programmable device with an array of programmable cells and interconnection network

Data holding circuit having backup function

Programmable device

Data processing apparatus and method for generating the data of an object program for a parallel operation apparatus

Programmable logic LSI

Processor having array of processing elements whose individual operations and mutual connections are variable

Base cell and two-dimensional array of base cells for programmable logic LSI

Data holding circuit having backup function

Data processing system for debugging utilizing halts in a parallel device

Information processing apparatus and method for using reconfigurable device

Array—type computer processor with reduced instruction storage

RENESAS ELECTRONICS CORP

Reconfigurable device

Semiconductor device and control method thereof for processing

Parallel arithmetic device, data processing system with parallel arithmetic device, and data processing program

Semiconductor device and method of controlling the semiconductor device

Semiconductor device and method of controlling the semiconductor device

Behavioral synthesis apparatus, behavioral synthesis method, data processing system including behavioral synthesis apparatus, and non-transitory computer readable medium storing behavioral synthesis program

Semiconductor device and control method thereof for processing

Semiconductor device including array of processor elements and method of controlling the same

Semiconductor device, data generation methods used for the same, and method of controlling the same

Switch coupled function blocks with additional direct coupling and internal data passing from input to output to facilitate more switched inputs to second block

NEC ELECTRONICS CORP

Stream processor and information processing apparatus

Array-type processor having state control units controlling a plurality of processor elements arranged in a matrix

Array-type computer processor

FUJII TARO

State transition management device and state transition management method thereof

State transition management device and method

Array-type processor having plural processor elements controlled by a state control unit

TOI TAKAO

Reconfigurable device

Behavioral synthesis apparatus, behavioral synthesis method, and computer readable recording medium