Inventor
KOWARIK OSKAR
DE23 patents
⚠️ This page may combine multiple inventors who share the name “KOWARIK OSKAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INFINEON TECHNOLOGIES AG
11 patentsUS6388917B2May 14, 2002
Method for nondestructively reading memory cells of an MRAM memory
INFINEON TECHNOLOGIES AG43 citations92
US6317356B1Nov 13, 2001
Configuration for self-referencing ferroelectric memory cells
INFINEON TECHNOLOGIES AG42 citations92
US6747891B2Jun 8, 2004
Circuit for non-destructive, self-normalizing reading-out of MRAM memory cells
INFINEON TECHNOLOGIES AG17 citations84
US6404668B2Jun 11, 2002
Memory configuration including a plurality of resistive ferroelectric memory cells
INFINEON TECHNOLOGIES AG16 citations84
US6768667B2Jul 27, 2004
Semiconductor memory device
INFINEON TECHNOLOGIES AG7 citations74
US6392918B2May 21, 2002
Circuit configuration for generating a reference voltage for reading a ferroelectric memory
INFINEON TECHNOLOGIES AG11 citations74
US6627935B2Sep 30, 2003
Resistive ferroelectric memory cell
INFINEON TECHNOLOGIES AG12 citations66
US6480044B2Nov 12, 2002
Semiconductor circuit configuration
INFINEON TECHNOLOGIES AG2 citations63
US6452830B2Sep 17, 2002
Memory configuration including a plurality of resistive ferroelectric memory cells
INFINEON TECHNOLOGIES AG5 citations63
US6407945B2Jun 18, 2002
Method for reading nonvolatile semiconductor memory configurations
INFINEON TECHNOLOGIES AG5 citations60
US6806550B2Oct 19, 2004
Evaluation configuration for semiconductor memories
INFINEON TECHNOLOGIES AG0 citations52
SIEMENS AG
11 patentsUS5184326AFeb 2, 1993
Integrated semiconductor memory of the dram type and method for testing the same
SIEMENS AG36 citations92
US4922134AMay 1, 1990
Testable redundancy decoder of an integrated semiconductor memory
SIEMENS AG20 citations81
US5030861AJul 9, 1991
Gate circuit having MOS transistors
SIEMENS AG7 citations73
US4956819ASep 11, 1990
Circuit configuration and a method of testing storage cells
SIEMENS AG19 citations73
US4896322AJan 23, 1990
Circuit configuration and a method for the testing of storage cells
SIEMENS AG8 citations73
US4885748ADec 5, 1989
Method and circuit configuration of the parallel input of data into a semiconductor memory
SIEMENS AG13 citations73
US4855621AAug 8, 1989
Multi-stage, integrated decoder device having redundancy test enable
SIEMENS AG12 citations73
US4803386AFeb 7, 1989
Digital amplifier configuration in integrated circuits
SIEMENS AG9 citations73
US5774014AJun 30, 1998
Integrated buffer circuit which functions independently of fluctuations on the supply voltage
SIEMENS AG5 citations60
US5253209AOct 12, 1993
Integrated semiconductor memory
SIEMENS AG4 citations60
USRE36061EJan 26, 1999
Integrated semiconductor memory
SIEMENS AG0 citations41