Inventor
LIM CHUL-HYUN
US4 patents
Patents
4 patentsUS9508796B2Nov 29, 2016
Internal spacers for nanowire transistors and method of fabrication thereof
INTEL CORP9 citations82
US9935205B2Apr 3, 2018
Internal spacers for nanowire transistors and method of fabrication thereof
INTEL CORP3 citations71
US12249541B2Mar 11, 2025
Vertical edge blocking (VEB) technique for increasing patterning process margin
INTEL CORP0 citations61
US11594448B2Feb 28, 2023
Vertical edge blocking (VEB) technique for increasing patterning process margin
INTEL CORP0 citations61