Inventor
SUCHARITAVES JEANNE-TANIA
US12 patents
⚠️ This page may combine multiple inventors who share the name “SUCHARITAVES JEANNE-TANIA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
9 patentsUS7930667B2Apr 19, 2011
System and method of automated wire and via layout optimization description
IBM8 citations83
US7739632B2Jun 15, 2010
System and method of automated wire and via layout optimization description
IBM11 citations83
US7250363B2Jul 31, 2007
Aligned dummy metal fill and hole shapes
IBM13 citations83
US7861208B2Dec 28, 2010
Structure for partitioned dummy fill shapes for reduced mask bias with alternating phase shift masks
IBM2 citations62
US7709300B2May 4, 2010
Structure and method for partitioned dummy fill shapes for reduced mask bias with alternating phase shift masks
IBM3 citations62
US8006211B2Aug 23, 2011
IC chip and design structure including stitched circuitry region boundary identification
IBM0 citations51
US7958482B2Jun 7, 2011
Stitched circuitry region boundary identification for stitched IC chip layout
IBM1 citations51
US7739648B2Jun 15, 2010
Formation of masks/reticles having dummy features
IBM1 citations51
US7858269B2Dec 28, 2010
Structure and method for sub-resolution dummy clear shapes for improved gate dimensional control
IBM0 citations35