Inventor

HABIB NAZMUL

US57 patents

⚠️ This page may combine multiple inventors who share the name “HABIB NAZMUL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HABIB NAZMUL

IBM

Multicore processor having storage for core-specific operational data

Methods and circuits for generating physically unclonable function

Semiconductor device reliability model and methodologies for use thereof

Circuit and method using distributed phase change elements for across-chip temperature profiling

Phase change material based temperature sensor

Testing method using a scalable parametric measurement macro

System for acquiring device parameters

Voltage island performance/leakage screen monitor for IP characterization

Methods, apparatus, and program products to optimize semiconductor product yield prediction for performance and leakage screens

System for and method of integrating test structures into an integrated circuit

Method of acceptance for semiconductor devices

Embedded test circuit for testing integrated circuits at the die level

Parametric-based semiconductor design

Integrated circuit chip reliability qualification using a sample-specific expected fail rate

Reliability-optimized selective voltage binning

Semiconductor device reliability model and methodologies for use thereof

Optimization of integrated circuit reliability

Optimization of integrated circuit reliability

Optimization of integrated circuit reliability

Application of stress conditions for homogenization of stress samples in semiconductor product acceleration studies

Application of stress conditions for homogenization of stress samples in semiconductor product acceleration studies

Scaling voltages in relation to die location

Optimization of integrated circuit reliability

Optimization of integrated circuit reliability

Array-based early threshold voltage recovery characterization measurement

Methods for normalizing strain in semicondcutor devices and strain normalized semiconductor devices

HDL design structure for integrating test structures into an integrated circuit design

Across reticle variation modeling and related reticle

System and method for managing semiconductor manufacturing defects

Integrated circuit chip reliability qualification using a sample-specific expected fail rate

System and method for managing semiconductor manufacturing defects

Scaling voltages in relation to die location

System integrator and system integration method with reliability optimized integrated circuit chip selection

In-situ computing system failure avoidance

Optimization of integrated circuit reliability

Product performance test binning

GLOBALFOUNDRIES INC

Integrated circuit chip reliability using reliability-optimized failure mechanism targeting

System and method for identifying operating temperatures and modifying of integrated circuits

Systems and methods to prevent incorporation of a used integrated circuit chip into a product

BICKFORD JEANNE P

Reliability evaluation and system fail warning methods using on chip parametric monitors

Reliability evaluation and system fail warning methods using on chip parametric monitors

MARVELL ASIA PTE LTD

IC chip package with dummy solder structure under corner, and related method

Heat sink configuration for multi-chip module

AGARWAL KANAK B

Measurement methodology and array structure for statistical stress and test of reliabilty structures

ANEMIKOS THEODOROS E

Speed binning for dynamic and adaptive power control

HABIB NAZMUL

Phase change material based temperature sensor

MARVELL INT LTD

IC chip package with dummy solder structure under corner, and related method

ANEMIKOS THEODOROS

Product performance test binning

MENTOR GRAPHICS CORP

Reliability evaluation and system fail warning methods using on chip parametric monitors

SPENCE BICKFORD JEANNE P

System and method to predict chip IDDQ and control leakage components